search for: gp_rel

Displaying 12 results from an estimated 12 matches for "gp_rel".

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2018 Sep 06
3
How to add Loongson ISA for Mips target?
...n: .frame $fp,48,$31 # vars= 16, regs= 3/0, args= 0, gp= 0 .mask 0xd0000000,-8 .fmask 0x00000000,0 .set noreorder .set nomacro daddiu $sp,$sp,-48 gssq $31,$fp,32($sp) sd $28,24($sp) move $fp,$sp lui $28,%hi(%neg(%gp_rel(main))) daddu $28,$28,$25 daddiu $28,$28,%lo(%neg(%gp_rel(main))) move $2,$4 sd $5,8($fp) sll $2,$2,0 sw $2,0($fp) ld $2,%got_page(.LC0)($28) daddiu $4,$2,%got_ofst(.LC0) ld $2,%call16(puts)($28) move $25,$2 .reloc...
2014 Dec 15
2
[LLVMdev] 3.5.1 Testing Phase Begins
...src/test/CodeGen/Mips/cconv/arguments-struct.ll:28:14: error: expected string not found in input ; SYM32-DAG: lui [[PTR_HI:\$[0-9]+]], %hi(bytes) ^ <stdin>:15:7: note: scanning from here s_i8: # @s_i8 ^ <stdin>:24:5: note: possible intended match here addiu $2, $gp, %gp_rel(bytes) ^ — Cheers, Sebastian > >> _______________________________________________ >> LLVM Developers mailing list >> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
2014 Apr 29
2
[LLVMdev] MIPS n64 ABI and non-PIC
Has anyone experimented with generating non-PIC for MIPS64 and the n64 ABI? Currently MipsISelLowering.cpp uses conditions like: if ((getTargetMachine().getRelocationModel() == Reloc::PIC_) || IsN64) { } around any PIC code generation. Is generating non-PIC just untested, or is it known not to work? I can't find any discussion of it anywhere. I ran into this when trying to see why
2014 May 02
2
[LLVMdev] MIPS n64 ABI and non-PIC
...$1, %highest(foo) > > add $1, $1, %higher(foo) > > dsll $1, $1, 32 > > lui $2, %hi(foo) > > add $2, $2, %lo(foo) > > add $1, $1, $2 > > which is 6 instructions per-symbol referenced. The current PIC > implementation generates this: > > lui $1, %hi(%neg(%gp_rel(bar))) > > daddu $1, $1, $25 > > daddiu $1, $1, %lo(%neg(%gp_rel(bar))) > > ld $2, %got_disp(foo)($1) > > which is a one-time cost of 3 instructions to set up the GOT pointer, plus > one load per-symbol referenced. > > > > *From:* llvmdev-bounces at cs.uiuc.ed...
2018 Sep 06
2
How to add Loongson ISA for Mips target?
...0 >> .mask 0xd0000000,-8 >> .fmask 0x00000000,0 >> .set noreorder >> .set nomacro >> daddiu $sp,$sp,-48 >> gssq $31,$fp,32($sp) >> sd $28,24($sp) >> move $fp,$sp >> lui $28,%hi(%neg(%gp_rel(main))) >> daddu $28,$28,$25 >> daddiu $28,$28,%lo(%neg(%gp_rel(main))) >> move $2,$4 >> sd $5,8($fp) >> sll $2,$2,0 >> sw $2,0($fp) >> ld $2,%got_page(.LC0)($28) >> daddiu $4,$2,%got_ofst(.LC0)...
2014 Dec 16
1
[LLVMdev] 3.5.1 Testing Phase Begins
...18:41 > To: Daniel Sanders > Cc: Ben Pope; Nikola Smiljanic; llvmdev > Subject: Re: [LLVMdev] 3.5.1 Testing Phase Begins > > For sake of completeness, I copy the output again: > > Command Output (stderr): […] > > > That's given me enough to figure out the problem. %gp_rel is only used when > the small data section is enabled and that's only supposed to be the case > for bare-metal. However, the guard is actually a test for 'is not Linux' and > this condition is of course true for windows. > > > > Just out of curiosity: this informati...
2014 Dec 16
1
[LLVMdev] 3.5.1 Testing Phase Begins
...ler at gmail.com>] Sent: 15 December 2014 18:41 To: Daniel Sanders Cc: Ben Pope; Nikola Smiljanic; llvmdev Subject: Re: [LLVMdev] 3.5.1 Testing Phase Begins For sake of completeness, I copy the output again: Command Output (stderr): [...] That's given me enough to figure out the problem. %gp_rel is only used when the small data section is enabled and that's only supposed to be the case for bare-metal. However, the guard is actually a test for 'is not Linux' and this condition is of course true for windows. Just out of curiosity: this information was also contained in my initi...
2016 Nov 08
3
[MC] Target-Independent Small Data Section Handling
...ce compared with the SVR4 ABI is the use of SDA (small data area). This allows full-word constants and data to be grouped into small-data sections accessed using relocated addresses; calculated relative to the non-volatile values loaded into base registers r13 and r2 by the runtime init (similar to gp_rel on MIPS). Only a single load/store instruction is needed to contain the relocated address. The MIPS target already has a solid approach for handling small global variables in its TargetLoweringObjectFile subclass. Also, the clang driver responds to the `-G <bytes>` flag so the user can defin...
2016 Nov 17
3
[MC] Target-Independent Small Data Section Handling
...ce compared with the SVR4 ABI is the use of SDA (small data area). This allows full-word constants and data to be grouped into small-data sections accessed using relocated addresses; calculated relative to the non-volatile values loaded into base registers r13 and r2 by the runtime init (similar to gp_rel on MIPS). Only a single load/store instruction is needed to contain the relocated address. > > The MIPS target already has a solid approach for handling small global variables in its TargetLoweringObjectFile subclass. Also, the clang driver responds to the `-G <bytes>` flag so the user...
2016 Nov 18
0
[MC] Target-Independent Small Data Section Handling
...of SDA (small data area). This allows full-word constants and > > data to be grouped into small-data sections accessed using > > relocated addresses; calculated relative to the non-volatile > > values loaded into base registers r13 and r2 by the runtime init > > (similar to gp_rel on MIPS). Only a single load/store instruction > > is needed to contain the relocated address. > > > > The MIPS target already has a solid approach for handling small > > global variables in its TargetLoweringObjectFile subclass. Also, > > the clang driver responds to...
2014 Dec 15
2
[LLVMdev] 3.5.1 Testing Phase Begins
2014-12-15 13:00 GMT+01:00 Daniel Sanders <Daniel.Sanders at imgtec.com>: >> LLVM: CodeGen/Mips/cconv/arguments-struct.ll > > Do you have the verbose lit output for this test? > I ran it again in verbose mode, but there were no additional outputs. Cheers, Sebastian
2014 Dec 12
9
[LLVMdev] 3.5.1 Testing Phase Begins
Hi, 3.5.1-rc1 has been tagged, so it is time to begin testing. We can always use more testers, so if you would like to volunteer, let me know. For those that are new to testing, please review the documentation for how validate a new release: http://llvm.org/docs/ReleaseProcess.html Remember that when we check for regressions we want to compare the test results of 3.5.1-rc1 with 3.5.0-final.