Displaying 6 results from an estimated 6 matches for "gm107_pmu_new".
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gf100_pmu_new
2017 Jul 03
0
[PATCH] therm/gm200: Added
...git a/drm/nouveau/nvkm/engine/device/base.c b/drm/nouveau/nvkm/engine/device/base.c
index 7bdc7a5a..39fdafed 100644
--- a/drm/nouveau/nvkm/engine/device/base.c
+++ b/drm/nouveau/nvkm/engine/device/base.c
@@ -2043,6 +2043,7 @@ nv120_chipset = {
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
.pmu = gm107_pmu_new,
+ .therm = gm200_therm_new,
.secboot = gm200_secboot_new,
.timer = gk20a_timer_new,
.top = gk104_top_new,
@@ -2077,6 +2078,7 @@ nv124_chipset = {
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
.pmu = gm107_pmu_new,
+ .therm = gm200_therm_new,
.secboot = gm200_secboot_new,
.timer = gk20...
2016 Jan 01
9
[PATCH v4 0/9] PCIe speed changes
overall it is for the most part the same as my older version.
I cleaned up some copyright things, so that it is more like the others.
Also I moved the print about the max speed supported into preinit and did
some other minor cleanups in the 3rd commit.
Happy testing (and performance for prime offloading setups)
Karol Herbst (9):
pci: add gk104 variant
pci: add gf106 variant
pci: implement
2015 Oct 12
12
[PATCH 0/9] PCIe speed changes
this patch series implements PCIe speed changes for Tesla and newer.
The Kepler and Fermi bits are tested on my cards at home.
Karol Herbst (9):
pci: add gk104 variant
pci: add gf106 variant
pci: implement generic code for PCIe speed change
pci: implement pcie speed change for tesla
pci: implement pcie speed change on Fermi
pci: implement PCIe speed change for kepler+
bios/perf:
2015 Oct 13
12
[PATCH v2 0/9] PCIEs speed change
overall the same as the old stuff, but with better namings and tirivialy
improved code here and there
Karol Herbst (9):
pci: add gk104 variant
pci: add gf106 variant
pci: implement generic code for PCIe speed change
pci: implement pcie speed change for tesla
pci: implement pcie speed change on Fermi
pci: implement PCIe speed change for kepler+
bios/perf: parse the pci speed from the
2016 Dec 13
15
[PATCH v2 0/15] Falcon library
This was the first step of the secure boot refactoring - as Ben asked for some
fixes, I now submit it as its own series to make it easier to review (and also
because rebasing secure boot on top of this takes time and I don't want to do
it until this is validated!).
This series attempts to factorize the duplicate falcon-related code into a
single library, using the existing nvkm_falcon
2016 Nov 21
33
[PATCH v4 0/33] Secure Boot refactoring / signed PMU firmware support for GM20B
This revision includes initial signed PMU firmware support for GM20B
(Tegra X1). This PMU code will also be used as a basis for dGPU signed
PMU firmware support.
With the PMU code, the refactoring of secure boot should also make
more sense.
ACR (secure boot) support is now separated by the driver version it
originates from. This separation allows to run any version of the ACR
on any chip,