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...e FastISel will switch back to DAG lowering mechanism if (1) there > is a function call in the basic block and (2) the relocation model is PIC. > Please have a look. Hoping the patch will help. > > Sincerely, > Logan > > > On Wed, Aug 21, 2013 at 10:17 AM, Gordon Keiser <gkeiser at arxan.com<mailto:gkeiser at arxan.com>> wrote: >> >> Cool, I'll file a bug tomorrow at work and add you to the CC list. >> >> Thanks! >> Gordon Keiser >> Software Development Engineer >> Arxan Technologies >> gkeiser at arxan.com<ma...

...is a function call in the basic block and (2) the relocation model is >> PIC. >> > Please have a look. Hoping the patch will help. >> > >> > Sincerely, >> > Logan >> > >> > >> > On Wed, Aug 21, 2013 at 10:17 AM, Gordon Keiser <gkeiser at arxan.com> >> wrote: >> >> >> >> Cool, I'll file a bug tomorrow at work and add you to the CC list. >> >> >> >> Thanks! >> >> Gordon Keiser >> >> Software Development Engineer >> >> Arxan Technologie...

...block and (2) the relocation model is >>> PIC. >>> > Please have a look. Hoping the patch will help. >>> > >>> > Sincerely, >>> > Logan >>> > >>> > >>> > On Wed, Aug 21, 2013 at 10:17 AM, Gordon Keiser <gkeiser at arxan.com> >>> wrote: >>> >> >>> >> Cool, I'll file a bug tomorrow at work and add you to the CC list. >>> >> >>> >> Thanks! >>> >> Gordon Keiser >>> >> Software Development Engineer >&gt...

Cool, I'll file a bug tomorrow at work and add you to the CC list. Thanks! Gordon Keiser Software Development Engineer Arxan Technologies gkeiser at arxan.com www.arxan.com  Protecting the App EconomyT  > -----Original Message----- > From: Eric Christopher [mailto:echristo at gmail.com] > Sent: Tuesday, August 20, 2013 9:47 PM > To: Gordon Keiser > Cc: llvmdev at cs.uiuc.edu; JF Bastien > Subject: Re: [LLVMdev] Broken PL...

...e FastISel will switch back to DAG lowering mechanism if (1) there > is a function call in the basic block and (2) the relocation model is PIC. > Please have a look. Hoping the patch will help. > > Sincerely, > Logan > > > On Wed, Aug 21, 2013 at 10:17 AM, Gordon Keiser <gkeiser at arxan.com> wrote: >> >> Cool, I'll file a bug tomorrow at work and add you to the CC list. >> >> Thanks! >> Gordon Keiser >> Software Development Engineer >> Arxan Technologies >> gkeiser at arxan.com www.arxan.com >> Protecting the A...

...function call. With this patch, the FastISel will switch back to DAG lowering mechanism if (1) there is a function call in the basic block and (2) the relocation model is PIC. Please have a look. Hoping the patch will help. Sincerely, Logan On Wed, Aug 21, 2013 at 10:17 AM, Gordon Keiser <gkeiser at arxan.com> wrote: > Cool, I'll file a bug tomorrow at work and add you to the CC list. > > Thanks! > Gordon Keiser > Software Development Engineer > Arxan Technologies > gkeiser at arxan.com www.arxan.com > Protecting the App EconomyT > > > -----Original...

...ism if (1) > there > > is a function call in the basic block and (2) the relocation model is > PIC. > > Please have a look. Hoping the patch will help. > > > > Sincerely, > > Logan > > > > > > On Wed, Aug 21, 2013 at 10:17 AM, Gordon Keiser <gkeiser at arxan.com> > wrote: > >> > >> Cool, I'll file a bug tomorrow at work and add you to the CC list. > >> > >> Thanks! > >> Gordon Keiser > >> Software Development Engineer > >> Arxan Technologies > >> gkeiser at arxan...

On 04/12/2012 06:29, Michael Spencer wrote: > On Mon, Dec 3, 2012 at 8:08 PM, Gordon Keiser <gkeiser at arxan.com> wrote: >> As an update to this: >> http://connect.microsoft.com/VisualStudio/feedback/details/769222/cl-exe-ice-when-building-llvm-trunk-at-o2 >> >> Microsoft has reproduced the ICE, given a workaround, and is planning a fix for a future MSVC release. I kn...

> On Behalf Of Nicholas Chapman > > On 04/12/2012 06:29, Michael Spencer wrote: > > On Mon, Dec 3, 2012 at 8:08 PM, Gordon Keiser <gkeiser at arxan.com> > wrote: > >> As an update to this: > >> http://connect.microsoft.com/VisualStudio/feedback/details/769222/cl- > >> exe-ice-when-building-llvm-trunk-at-o2 > >> > >> Microsoft has reproduced the ICE, given a workaround, and is planning...

...to disassemble both x86 and ARM PEs (although ARM required > a manual arch override). If I can find a subset of the test suite that doesn't > require MinGW I'll give it a run on the rasberry pi. > > Gordon Keiser > Software Development Engineer > Arxan Technologies > gkeiser at arxan.com www.arxan.com >

Filing a bug would be a good start, go ahead and cc me and jfb at google.com. Thanks! -eric On Tue, Aug 20, 2013 at 6:10 PM, Gordon Keiser <gkeiser at arxan.com> wrote: > For ARM targets on linux, revision 183966 made Fast ISel default. > Unfortunately, Fast ISel is broken in terms of applying the ARMII::MO_PLT > flags to calls in PIC mode (at least when emitting assembly); it never does > this. The normal ISel pass handles th...

On Mon, Dec 3, 2012 at 8:08 PM, Gordon Keiser <gkeiser at arxan.com> wrote: > As an update to this: > http://connect.microsoft.com/VisualStudio/feedback/details/769222/cl-exe-ice-when-building-llvm-trunk-at-o2 > > Microsoft has reproduced the ICE, given a workaround, and is planning a fix for a future MSVC release. I know not a lot of...

For ARM targets on linux, revision 183966 made Fast ISel default. Unfortunately, Fast ISel is broken in terms of applying the ARMII::MO_PLT flags to calls in PIC mode (at least when emitting assembly); it never does this. The normal ISel pass handles this situation correctly so a temporary local change to disable FastISel for linux / NaCl targets is working for me right now. I'm not very

Hi Gordon, Clang can do it if you include <stdbool.h> .  I found this out when writing a LibC wrapper library for LLVM Bitcode. --Sam >________________________________ >From: Gordon Keiser <gkeiser at arxan.com> >To: "llvmdev at cs.uiuc.edu" <llvmdev at cs.uiuc.edu> >Sent: Wednesday, September 21, 2011 9:55 PM >Subject: [LLVMdev] Returning i1 type ints from C code ? > > >Hi, >  >I was wondering if there was any way to return an i1 type (or something...

> -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Óscar Fuentes > > Vladimir Pouzanov <farcaller at gmail.com> writes: > > > On Dec 10, 2012, at 21:57, Jim Grosbach <grosbach at apple.com> wrote: > >> Llvm typically doesn't build with RTTI enabled. Perhaps that's what

Gordon Keiser <gkeiser at arxan.com> writes: > There is (was?) a CMake variable for this if you're going that route. > Setting LLVM_REQUIRES_RTTI=1 enabled an RTTI build that I haven't had > issues with. I don't know what the ./configure equivalent is, sorry. LLVM_REQUIRES_RTTI is an internal va...

...nutils (I'll call it $ARM_BIN) called arm-none-linux-gnueabi-clang (and one with clang++ too) and another link in the $ARM_BIN/../lib directory to clang directory located under clang's lib (for includes) should be enough. Gordon Keiser Software Development Engineer Arxan Technologies gkeiser at arxan.com www.arxan.com  > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of salvatore benedetto > Sent: Saturday, July 28, 2012 11:05 AM > To: llvmdev at cs.uiuc.edu > Subject: [LLVMdev] Cross-compiling...

Hi there, I'm using clang to cross compile for cortex-m3. I eventually managed to do so with clang++ -ccc-gcc-name arm-none-linux-gnueabi-g++ -ccc-host-triple thumbv7m-none-gnueabi source.cpp -c -mcpu=cortex-m3 I would like to understand what -ccc-gcc-name does exactly and how can I get ride of it? >From what I understand, it's needed by the driver in order to find the binutils for

Hi, I was wondering if there was any way to return an i1 type (or something that llvm would accept as one, internally) from a C function compiled with llvm-gcc. My thought from searching around was that it might take rewriting (or at least writing a wrapper to %trunc the result) in assembly. I'm fairly new to LLVM so I may have missed something important. Any thoughts ? Thanks much,

...Also take a look at Disarm ( http://code.google.com/p/disarm/ ) which is an ARM machine code to LLVM-IR disassembler. There may be quite a bit of relevant work done there. Gordon Keiser Software Development Engineer Arxan Technologies w:+1.765.889.4756   m:+1.765.237.4833  f:+1.415.247.0910 gkeiser at arxan.com www.arxan.com  Protecting the App Economy™