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Cool, I'll file a bug tomorrow at work and add you to the CC list. Thanks! Gordon Keiser Software Development Engineer Arxan Technologies gkeiser at arxan.com www.arxan.com  Protecting the App EconomyT  > -----Original Message----- > From: Eric Christopher [mailto:echristo at gmail.com] > Sent: Tuesday, August 20, 2013 9:47 PM > To: Gordon Keiser > Cc: llvmdev at cs.u...

On 04/12/2012 06:29, Michael Spencer wrote: > On Mon, Dec 3, 2012 at 8:08 PM, Gordon Keiser <gkeiser at arxan.com> wrote: >> As an update to this: >> http://connect.microsoft.com/VisualStudio/feedback/details/769222/cl-exe-ice-when-building-llvm-trunk-at-o2 >> >> Microsoft has reproduced the ICE, given a workaround, and is planning a fix for a future MSVC rel...

...; patch, the FastISel will switch back to DAG lowering mechanism if (1) there > is a function call in the basic block and (2) the relocation model is PIC. > Please have a look. Hoping the patch will help. > > Sincerely, > Logan > > > On Wed, Aug 21, 2013 at 10:17 AM, Gordon Keiser <gkeiser at arxan.com> wrote: >> >> Cool, I'll file a bug tomorrow at work and add you to the CC list. >> >> Thanks! >> Gordon Keiser >> Software Development Engineer >> Arxan Technologies >> gkeiser at arxan.com www.arxan.com >> Prot...

...ne, internally) from a C function compiled with llvm-gcc. My thought from searching around was that it might take rewriting (or at least writing a wrapper to %trunc the result) in assembly. I'm fairly new to LLVM so I may have missed something important. Any thoughts ? Thanks much, Gordon Keiser -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110921/d5e19fc2/attachment.html>

> On Behalf Of Nicholas Chapman > > On 04/12/2012 06:29, Michael Spencer wrote: > > On Mon, Dec 3, 2012 at 8:08 PM, Gordon Keiser <gkeiser at arxan.com> > wrote: > >> As an update to this: > >> http://connect.microsoft.com/VisualStudio/feedback/details/769222/cl- > >> exe-ice-when-building-llvm-trunk-at-o2 > >> > >> Microsoft has reproduced the ICE, given a workaround, and...

...n a workaround, and is planning a fix for a future MSVC release. I know not a lot of people are building with VS, but it's nice to know. The workaround involves marking a single function with attribute((noinline)) and is detailed on the page, so nothing too horrible there. Cheers, Gordon Keiser Software Development Engineer Arxan Technologies > -----Original Message----- > From: Gordon Keiser > Sent: Wednesday, October 31, 2012 2:02 AM > To: llvmdev at cs.uiuc.edu > Subject: Visual Studio 2012 cl.exe ICE while building LLVM for x64 (in > TableGen) at -O2 > > Hi,...

...ith the PIC function call. With this patch, the FastISel will switch back to DAG lowering mechanism if (1) there is a function call in the basic block and (2) the relocation model is PIC. Please have a look. Hoping the patch will help. Sincerely, Logan On Wed, Aug 21, 2013 at 10:17 AM, Gordon Keiser <gkeiser at arxan.com> wrote: > Cool, I'll file a bug tomorrow at work and add you to the CC list. > > Thanks! > Gordon Keiser > Software Development Engineer > Arxan Technologies > gkeiser at arxan.com www.arxan.com > Protecting the App EconomyT > > > -...

...;> > is a function call in the basic block and (2) the relocation model is >> PIC. >> > Please have a look. Hoping the patch will help. >> > >> > Sincerely, >> > Logan >> > >> > >> > On Wed, Aug 21, 2013 at 10:17 AM, Gordon Keiser <gkeiser at arxan.com> >> wrote: >> >> >> >> Cool, I'll file a bug tomorrow at work and add you to the CC list. >> >> >> >> Thanks! >> >> Gordon Keiser >> >> Software Development Engineer >> >> Arxan...

...ring mechanism if (1) > there > > is a function call in the basic block and (2) the relocation model is > PIC. > > Please have a look. Hoping the patch will help. > > > > Sincerely, > > Logan > > > > > > On Wed, Aug 21, 2013 at 10:17 AM, Gordon Keiser <gkeiser at arxan.com> > wrote: > >> > >> Cool, I'll file a bug tomorrow at work and add you to the CC list. > >> > >> Thanks! > >> Gordon Keiser > >> Software Development Engineer > >> Arxan Technologies > >> gkei...

Hi Gordon, Clang can do it if you include <stdbool.h> .  I found this out when writing a LibC wrapper library for LLVM Bitcode. --Sam >________________________________ >From: Gordon Keiser <gkeiser at arxan.com> >To: "llvmdev at cs.uiuc.edu" <llvmdev at cs.uiuc.edu> >Sent: Wednesday, September 21, 2011 9:55 PM >Subject: [LLVMdev] Returning i1 type ints from C code ? > > >Hi, >  >I was wondering if there was any way to return an i1 type (o...

...; patch, the FastISel will switch back to DAG lowering mechanism if (1) there > is a function call in the basic block and (2) the relocation model is PIC. > Please have a look. Hoping the patch will help. > > Sincerely, > Logan > > > On Wed, Aug 21, 2013 at 10:17 AM, Gordon Keiser <gkeiser at arxan.com<mailto:gkeiser at arxan.com>> wrote: >> >> Cool, I'll file a bug tomorrow at work and add you to the CC list. >> >> Thanks! >> Gordon Keiser >> Software Development Engineer >> Arxan Technologies >> gkeiser at arx...

...the basic block and (2) the relocation model is >>> PIC. >>> > Please have a look. Hoping the patch will help. >>> > >>> > Sincerely, >>> > Logan >>> > >>> > >>> > On Wed, Aug 21, 2013 at 10:17 AM, Gordon Keiser <gkeiser at arxan.com> >>> wrote: >>> >> >>> >> Cool, I'll file a bug tomorrow at work and add you to the CC list. >>> >> >>> >> Thanks! >>> >> Gordon Keiser >>> >> Software Development Engi...

On Mon, Dec 3, 2012 at 8:08 PM, Gordon Keiser <gkeiser at arxan.com> wrote: > As an update to this: > http://connect.microsoft.com/VisualStudio/feedback/details/769222/cl-exe-ice-when-building-llvm-trunk-at-o2 > > Microsoft has reproduced the ICE, given a workaround, and is planning a fix for a future MSVC release. I know n...

Filing a bug would be a good start, go ahead and cc me and jfb at google.com. Thanks! -eric On Tue, Aug 20, 2013 at 6:10 PM, Gordon Keiser <gkeiser at arxan.com> wrote: > For ARM targets on linux, revision 183966 made Fast ISel default. > Unfortunately, Fast ISel is broken in terms of applying the ARMII::MO_PLT > flags to calls in PIC mode (at least when emitting assembly); it never does > this. The normal ISel pas...

For ARM targets on linux, revision 183966 made Fast ISel default. Unfortunately, Fast ISel is broken in terms of applying the ARMII::MO_PLT flags to calls in PIC mode (at least when emitting assembly); it never does this. The normal ISel pass handles this situation correctly so a temporary local change to disable FastISel for linux / NaCl targets is working for me right now. I'm not very

> -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Óscar Fuentes > > Vladimir Pouzanov <farcaller at gmail.com> writes: > > > On Dec 10, 2012, at 21:57, Jim Grosbach <grosbach at apple.com> wrote: > >> Llvm typically doesn't build with RTTI enabled. Perhaps that's what

Gordon Keiser <gkeiser at arxan.com> writes: > There is (was?) a CMake variable for this if you're going that route. > Setting LLVM_REQUIRES_RTTI=1 enabled an RTTI build that I haven't had > issues with. I don't know what the ./configure equivalent is, sorry. LLVM_REQUIRES_RTTI is an...

Hi All, I tried to use CallGraph in llvm by adding "AU.addRequired<CallGraph>();" in getAnalysisUsage function. But it reports an error: include/llvm/PassAnalysisSupport.h:56:39: error: ‘ID’ is not a member of ‘llvm::CallGraph’ return addRequiredID(PassClass::ID); How to use it correctly? Thanks, Haopeng

But read the code and then answer the question. :) On 07/25/2012 06:19 PM, Gordon Keiser wrote: > From the comment at the top of the file: > > /* > * This file is used to the C calling conventions with signless > * LLVM. Integer arguments in this convention are promoted to at > * least a 32-bit size. Consequently signed values must be > * sign extended and...

...is instruction could be forced to a high register safely, but unfortunately I don't understand the target code enough yet to implement this. The other (ugly and slow) option might be to encode the low-register versions with a PUSH Rm / POP Rd pair when on ARMv5 or less. Any thoughts? -Gordon Keiser Software Development Engineer Arxan Technologies, Inc. 1305 Cumberland Ave, Ste 215 West Lafayette, IN 47906 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120107/2418fe9b/attachment.html>