Displaying 9 results from an estimated 9 matches for "getsizeexpressioninbits".
2018 Jun 05
3
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...t; ``<scalable x 4 x i32>`` and ``<scalable x 8 x i16>`` have the same number of
>> bytes.
>
> "scalable" instead of "scalable x."
Yep, missed that in the conversion from the old <n x m x ty> format.
>
>> For derived types, a function (getSizeExpressionInBits) to return a pair of
>> integers (one to indicate unscaled bits, the other for bits that need to be
>> scaled by the runtime multiple) will be added. For backends that do not need to
>> deal with scalable types, another function (getFixedSizeExpressionInBits) that
>> only re...
2018 Jun 06
2
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
Hi David,
>>> The name "getSizeExpressionInBits" makes me think that a Value
>>> expression will be returned (something like a ConstantExpr that uses
>>> vscale). I would be surprised to get a pair of integers back. Do
>>> clients actually need constant integer values or would a ConstantExpr
>>> sufffic...
2018 Jun 05
2
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
On 5 June 2018 at 16:23, <dag at cray.com> wrote:
> The name "getSizeExpressionInBits" makes me think that a Value
> expression will be returned (something like a ConstantExpr that uses
> vscale). I would be surprised to get a pair of integers back.
Same here.
> If we went the ConstantExpr route and added ConstantExpr support to
> ScalarEvolution, then SCEVs cou...
2018 Jun 07
3
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...u're getting at. A ConstantExpr would
>>> encapsulate this computation. We alreay have "non-static-constant"
>>> values for ConstantExpr like sizeof and offsetof. I would see
>>> VScaleConstant in that same tradition. In your struct example,
>>> getSizeExpressionInBits would return:
>>>
>>> add(mul(256, vscale), 64)
>>>
>>> Does that satisfy your needs?
>>
>> Ah, I think the use of 'expression' in the name definitely confuses the issue then. This
>> isn't for expressing the size in IR, where you...
2018 Jun 05
14
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...types, getPrimitiveSizeInBits will function as it does today,
except that it will no longer return a size for vector types (it will return 0,
as it does for other derived types). The majority of calls to this function are
already for scalar rather than vector types.
For derived types, a function (getSizeExpressionInBits) to return a pair of
integers (one to indicate unscaled bits, the other for bits that need to be
scaled by the runtime multiple) will be added. For backends that do not need to
deal with scalable types, another function (getFixedSizeExpressionInBits) that
only returns unscaled bits will be provided...
2019 May 24
2
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...InBits will function as it does today,
> except that it will no longer return a size for vector types (it will return 0,
> as it does for other derived types). The majority of calls to this function are
> already for scalar rather than vector types.
>
> For derived types, a function (getSizeExpressionInBits) to return a pair of
> integers (one to indicate unscaled bits, the other for bits that need to be
> scaled by the runtime multiple) will be added. For backends that do not need to
> deal with scalable types, another function (getFixedSizeExpressionInBits) that
> only returns unscaled b...
2019 May 24
2
[EXT] Re: [RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...types, getPrimitiveSizeInBits will function as it does today,
except that it will no longer return a size for vector types (it will return 0,
as it does for other derived types). The majority of calls to this function are
already for scalar rather than vector types.
For derived types, a function (getSizeExpressionInBits) to return a pair of
integers (one to indicate unscaled bits, the other for bits that need to be
scaled by the runtime multiple) will be added. For backends that do not need to
deal with scalable types, another function (getFixedSizeExpressionInBits) that
only returns unscaled bits will be provided...
2019 May 27
2
[EXT] Re: [RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...types, getPrimitiveSizeInBits will function as it does today,
except that it will no longer return a size for vector types (it will return 0,
as it does for other derived types). The majority of calls to this function are
already for scalar rather than vector types.
For derived types, a function (getSizeExpressionInBits) to return a pair of
integers (one to indicate unscaled bits, the other for bits that need to be
scaled by the runtime multiple) will be added. For backends that do not need to
deal with scalable types, another function (getFixedSizeExpressionInBits) that
only returns unscaled bits will be provided...
2019 Jun 03
2
[EXT] Re: [RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...InBits will function as it does today,
> except that it will no longer return a size for vector types (it will return 0,
> as it does for other derived types). The majority of calls to this function are
> already for scalar rather than vector types.
>
> For derived types, a function (getSizeExpressionInBits) to return a pair of
> integers (one to indicate unscaled bits, the other for bits that need to be
> scaled by the runtime multiple) will be added. For backends that do not need to
> deal with scalable types, another function (getFixedSizeExpressionInBits) that
> only returns unscaled b...