Displaying 10 results from an estimated 10 matches for "getmask".
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netmask
2016 Mar 16
2
[PATCH mesa 6/6] nouveau: codegen: Disable more old resource handling code
...f (tgsi.getDst(0).getFile() == TGSI_FILE_BUFFER ||
> - tgsi.getDst(0).getFile() == TGSI_FILE_MEMORY) {
> + switch (tgsi.getDst(0).getFile()) {
> + case TGSI_FILE_BUFFER:
> + case TGSI_FILE_MEMORY:
> for (c = 0; c < 4; ++c) {
> if (!(tgsi.getDst(0).getMask() & (1 << c)))
> continue;
> @@ -2396,9 +2406,12 @@ Converter::handleSTORE()
> if (tgsi.getDst(0).isIndirect(0))
> st->setIndirect(0, 1, fetchSrc(tgsi.getDst(0).getIndirect(0), 0, 0));
> }
> - return;
> + bre...
2016 Mar 16
0
[PATCH mesa 6/6] nouveau: codegen: Disable more old resource handling code
...e *> off, src, dummy;
- if (tgsi.getDst(0).getFile() == TGSI_FILE_BUFFER ||
- tgsi.getDst(0).getFile() == TGSI_FILE_MEMORY) {
+ switch (tgsi.getDst(0).getFile()) {
+ case TGSI_FILE_BUFFER:
+ case TGSI_FILE_MEMORY:
for (c = 0; c < 4; ++c) {
if (!(tgsi.getDst(0).getMask() & (1 << c)))
continue;
@@ -2396,9 +2406,12 @@ Converter::handleSTORE()
if (tgsi.getDst(0).isIndirect(0))
st->setIndirect(0, 1, fetchSrc(tgsi.getDst(0).getIndirect(0), 0, 0));
}
- return;
+ break;
+ default:
+ assert(!"U...
2016 Mar 17
4
[PATCH mesa v2 1/3] nouveau: codegen: Disable more old resource handling code
...as reference when adding img support
getResourceCoords(off, r, 0);
src = off;
const int s = src.size();
@@ -2438,6 +2445,7 @@ Converter::handleSTORE()
mkTex(OP_SUSTP, getResourceTarget(code, r), code->resources[r].slot, 0,
dummy, src)->tex.mask = tgsi.getDst(0).getMask();
}
+*/
}
// XXX: These only work on resources with the single-component u32/s32 formats.
@@ -2484,7 +2492,7 @@ Converter::handleATOM(Value *dst0[4], DataType ty, uint16_t subOp)
return;
}
-
+/* Keep this around for now as reference when adding img support
getResourceCoord...
2016 Mar 16
0
[PATCH mesa 6/6] nouveau: codegen: Disable more old resource handling code
...e() == TGSI_FILE_BUFFER ||
>> - tgsi.getDst(0).getFile() == TGSI_FILE_MEMORY) {
>> + switch (tgsi.getDst(0).getFile()) {
>> + case TGSI_FILE_BUFFER:
>> + case TGSI_FILE_MEMORY:
>> for (c = 0; c < 4; ++c) {
>> if (!(tgsi.getDst(0).getMask() & (1 << c)))
>> continue;
>> @@ -2396,9 +2406,12 @@ Converter::handleSTORE()
>> if (tgsi.getDst(0).isIndirect(0))
>> st->setIndirect(0, 1, fetchSrc(tgsi.getDst(0).getIndirect(0), 0, 0));
>> }
>> -...
2016 Dec 11
2
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...edScatterSDNode (Chain, value, mask, base, index)
02118 // Mask is a vector of i1 elements
02119 const SDValue &getBasePtr() const { return getOperand(3); }
02120 const SDValue &getIndex() const { return getOperand(4); }
02121 const SDValue &getMask() const { return getOperand(2); }
02122 const SDValue &getValue() const { return getOperand(1); } // Alex: this
is pass-thru
*/
Thank you very much,
Alex
On 12/9/2016 4:18 PM, Will Lovett wrote:
> Hi Alex,
>
> I don’t know too much about recent MIPS, b...
2016 Dec 09
0
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
Hi Alex,
I don’t know too much about recent MIPS, but have recently been doing something similar for the new ARM SVE architecture, so hopefully this will get you closer to what you need:
If you’re looking where I think you are (lib/Target/X86/X86InstrAVX512.td), ‘GatherNode’ is a template argument, not a definition.
It allows a PatFrag be passed into the avx512_gather multiclass definition.
2016 Dec 12
0
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...(Chain, value, mask, base, index)
> 02118 // Mask is a vector of i1 elements
> 02119 const SDValue &getBasePtr() const { return getOperand(3); }
> 02120 const SDValue &getIndex() const { return getOperand(4); }
> 02121 const SDValue &getMask() const { return getOperand(2); }
> 02122 const SDValue &getValue() const { return getOperand(1); } // Alex: this
> is pass-thru
>
> */
>
>
> Thank you very much,
> Alex
>
> On 12/9/2016 4:18 PM, Will Lovett wrote:
>> Hi Alex,
>>...
2016 Dec 09
5
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
Hello.
I read on page 4 of http://www.cs.fsu.edu/~whalley/cda5155/chap4.pdf that gather and
scatter operations exist for Mips, named LVI and SVI, respectively.
Did anyone think of implementing in the LLVM Mips back end (part of the MSA vector
instructions) gather and scatter operations?
If so, can you share with me the TableGen spec? (I tried to start from LD_DESC_BASE,
but it
2016 Dec 15
2
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...ask, base, index)
>> 02118 // Mask is a vector of i1 elements
>> 02119 const SDValue &getBasePtr() const { return getOperand(3); }
>> 02120 const SDValue &getIndex() const { return getOperand(4); }
>> 02121 const SDValue &getMask() const { return getOperand(2); }
>> 02122 const SDValue &getValue() const { return getOperand(1); } // Alex: this
>> is pass-thru
>>
>> */
>>
>>
>> Thank you very much,
>> Alex
>>
>> On 12/9/2016 4:18 PM, Will...
2016 Mar 16
13
[PATCH mesa 1/6] tgsi_build: Fix return of uninitialized memory in tgsi_*_instruction_memory
tgsi_default_instruction_memory / tgsi_build_instruction_memory were
returning uninitialized memory for tgsi_instruction_memory.Texture and
tgsi_instruction_memory.Format. Note 0 means not set, and thus is a
correct default initializer for these.
Fixes: 3243b6fc97 ("tgsi: add Texture and Format to tgsi_instruction_memory")
Cc: Nicolai Hähnle <nicolai.haehnle at amd.com>