Displaying 10 results from an estimated 10 matches for "getfixedstack".
2012 Nov 24
2
[LLVMdev] Fwd: Prevention register promotion at the isel codegen phase
...e>(SpillSlot)->getIndex();
> SDValue Chain = CurDAG->getStore(CurDAG->getEntryNode(),
> SpillVal.getDebugLoc(),
> SpillVal, SpillSlot,
> MachinePointerInfo::getFixedStack(FI),
> false, false, 0);
> Chain = CurDAG->getLoad(SpillVal.getValueType(), SpillVal.getDebugLoc(),
> Chain, SpillSlot,
> MachinePointerInfo::getFixedStack(FI),
> fals...
2012 Nov 24
0
[LLVMdev] Fwd: Prevention register promotion at the isel codegen phase
...(SpillSlot)->getIndex();
> SDValue Chain = CurDAG->getStore(CurDAG->getEntryNode(),
> SpillVal.getDebugLoc(),
> SpillVal, SpillSlot,
>
> MachinePointerInfo::getFixedStack(FI),
> false, false, 0);
> Chain = CurDAG->getLoad(SpillVal.getValueType(), SpillVal.getDebugLoc(),
> Chain, SpillSlot,
> MachinePointerInfo::getFixedStack(FI),
> fals...
2013 Jan 18
0
[LLVMdev] llvm backend porting question ,
...Loc DL;
if (MI != MBB.end()) DL = MI->getDebugLoc();
MachineFunction &MF = *MBB.getParent();MF.dump();
MachineFrameInfo &MFI = *MF.getFrameInfo();
unsigned Align = MFI.getObjectAlignment(MVT::i8);
MachineMemOperand *MMO =
MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(MVT::i8),
MachineMemOperand::MOStore,
MFI.getObjectSize(MVT::i8),
Align);
BuildMI(MBB, MI, DL, get(Picoblaze::STORETOSTACK ));//.addMemOperand(MMO);
if (RC == &Picoblaze::GR8RegClass)
{
// BuildMI(...
2012 Oct 26
1
[LLVMdev] Properly handling mem-loc arguments when prologue adjusts FP.
...e, VA.getLocMemOffset(), true);
// Create the SelectionDAG nodes corresponding to a load from this
// parameter.
SDValue FIN = DAG.getFrameIndex(FI, MVT::i32);
InVals.push_back(DAG.getLoad(VA.getLocVT(), dl, Chain, FIN,
MachinePointerInfo::getFixedStack(FI),
false, false, false, 0));
}
...
[3] Example of prologue moving stack pointer (which the frame pointer is
then set to.)
...
if (VARegSaveSize) {
BuildMI(MBB, MBBI, dl, TII.get(ARC::SUBrsi), ARC::SP).addReg(ARC::SP)
.addImm(VARegSaveSize);...
2011 Jan 25
1
[LLVMdev] Trouble with virtual registers
...const llvm::TargetRegisterInfo*)
const {
DebugLoc DL;
if (MI != MBB.end()) DL = MI->getDebugLoc();
MachineFunction &MF = *MBB.getParent();
MachineFrameInfo &MFI = *MF.getFrameInfo();
MachineMemOperand *MMO =
MF.getMachineMemOperand(PseudoSourceValue::getFixedStack(FrameIdx),
MachineMemOperand::MOStore, 0,
MFI.getObjectSize(FrameIdx),
MFI.getObjectAlignment(FrameIdx));
unsigned tmpVReg =
MF.getRegInfo().createVirtualRegister(OURTARGET::IntRegsRegisterClass);
MachineInstr*...
2008 Feb 23
1
[LLVMdev] Obligatory monthly tail call patch
Hello everybody, hi Evan,
this patch changes the lowering of arguments for tail call optimized
calls. Before arguments that could be overwritten by each other were
explicitly lowered to a stack slot, not giving the register allocator
a chance to optimize. Now a sequence of copyto/copyfrom virtual
registers ensures that arguments are loaded in (virtual) registers
before they are lowered to the
2012 Mar 30
1
[LLVMdev] load instruction memory operands value null
Hi,
For a custom target, there is a pass to perform memory dependence analysis, where, i need to get memory pointer for "load instruction". I want to check the pointer alias behavior. I am getting this by considering the memoperands for the load instruction.
For "load instruction", Machine Instruction dumps as below:
vr12<def> = LD_Iri %vr2<kill>, 0;
2009 May 21
0
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote:
> Can you explain why you chose the approach of using a new pass?
> I pictured removing LegalizeDAG's type legalization code would
> mostly consist of finding all the places that use TLI.getTypeAction
> and just deleting code for handling its Expand and Promote. Are you
> anticipating something more
2009 May 20
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On May 20, 2009, at 1:34 PM, Eli Friedman wrote:
> On Wed, May 20, 2009 at 1:19 PM, Eli Friedman
> <eli.friedman at gmail.com> wrote:
>
>> Per subject, this patch adding an additional pass to handle vector
>>
>> operations; the idea is that this allows removing the code from
>>
>> LegalizeDAG that handles illegal types, which should be a significant
2009 May 21
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
...MVT::i32 , Custom);
}
// TODO: when we have SSE, these could be more efficient, by using movd/movq.
@@ -4608,8 +4612,14 @@
SDValue Chain = DAG.getStore(DAG.getEntryNode(), dl, Op.getOperand(0),
StackSlot,
PseudoSourceValue::getFixedStack(SSFI), 0);
+ return BuildFILD(Op, SrcVT, Chain, StackSlot, DAG);
+}
+SDValue X86TargetLowering::BuildFILD(SDValue Op, MVT SrcVT, SDValue Chain,
+ SDValue StackSlot,
+ SelectionDAG &DAG) {
// Build the FILD
+ DebugLoc...