search for: gadgets

...e :widget end class Widget < ActiveRecord::Base belongs_to :gadget def save gadget.save super end end ------------------------------------------- and the following test.... ------------------------------------------- class WidgetTest < Test::Unit::TestCase fixtures :widgets, :gadgets # Replace this with your real tests. def test_update w = Widget.find(1) assert_equal(w,w.gadget.widget) w.save end end ------------------------------------------- Obviously this is a contrived example (why would anyone every want to call w.gadget.widget?). However, it''s...

Given the following.. Foo has_many :bars Bar has_many ::widgets Widget has_many :gadgets Gadget has_many :parts All of the following are now possible... @foo.bars @bar.widgets @part.gadget.widget.bar.foo However, I can''t just do the opposite of that last one... @foo.bars.widgets.gadgets.parts and get a full list of every Part associated with @foo. I know there''s...

Greetings Everyone, I have created a new Google Gadget, this gadget combines three awesome services by Google, Gadget, Ajax Web Search and Custom Search Engine. All glued together with very well designed javascript classes built with prototypejs. The gadget is flexible in its settings to allow any CSE or site restriction but with a few customizations could be repurposed

On Fri, Aug 7, 2020 at 1:18 AM David Chisnall <David.Chisnall at cl.cam.ac.uk> wrote: > I think it would be useful for the discussion to have a clear threat model that this intends to defend against and a rough analysis of the security benefits that this is believed to bring. I view this as being even more about a ROP defense. Dealing with spill slots is, IMO, a separate issue, more

...; > > > https://gcc.gnu.org/pipermail/gcc-patches/2020-August/551607.html > > This link gives two motivations: > > 1. Reducing information leak (which I find unconvincing, because there's > a lot more left on the stack than in caller-save registers). > 2. Reducing ROP gadgets. > > Unfortunately, for claim 2 they cite a paper that is behind a paywall, > so I can't easily see what that's doing and I'll have to guess what the > paper says: > > Caller-save registers are intuitively useful in the first gadget in a > ROP sequence, because the...

I have two UPSs, one is not connected to a computer. I am looking for a gadget that I can plug in to the other one so I can see the time remaining without a computer.

Hi all, this series improves the use_mm / unuse_mm interface by better documenting the assumptions, and my taking the set_fs manipulations spread over the callers into the core API.

Hi all, this series improves the use_mm / unuse_mm interface by better documenting the assumptions, and my taking the set_fs manipulations spread over the callers into the core API.

Hi all, this series improves the use_mm / unuse_mm interface by better documenting the assumptions, and my taking the set_fs manipulations spread over the callers into the core API. Changes since v1: - drop a few patches - fix a comment typo - cover the newly merged use_mm/unuse_mm caller in vfio

Hi all, this series improves the use_mm / unuse_mm interface by better documenting the assumptions, and my taking the set_fs manipulations spread over the callers into the core API. Changes since v1: - drop a few patches - fix a comment typo - cover the newly merged use_mm/unuse_mm caller in vfio

Switch the function documentation to kerneldoc comments, and add WARN_ON_ONCE asserts that the calling thread is a kernel thread and does not have ->mm set (or has ->mm set in the case of unuse_mm). Also give the functions a kthread_ prefix to better document the use case. Signed-off-by: Christoph Hellwig <hch at lst.de> --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 4 +--

Switch the function documentation to kerneldoc comments, and add WARN_ON_ONCE asserts that the calling thread is a kernel thread and does not have ->mm set (or has ->mm set in the case of unuse_mm). Also give the functions a kthread_ prefix to better document the use case. Signed-off-by: Christoph Hellwig <hch at lst.de> Acked-by: Felix Kuehling <Felix.Kuehling at amd.com> ---

> On Nov 21, 2019, at 14:23, Robinson, Paul via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Some years ago there was a random-nop-insertion pass (for ROP gadget removal) proposed, which didn't stick; we recently had a summer intern work on it but did not get to proper quality; I'd like to revive that. Hi Paul, I'm curious about what the use case for this was. In

...red Server distro (Being RHCE certified I am more comfortable in an RPM enivronment) I am wanting to help spread the word of CentOS, but also help within the existing CentOS community. One idea I had, which I discussed with Karan briefly on Twitter a few weeks ago was building a number of iGoogle gadgets for various RSS feeds on centos.org (EG planet.centos.org and the main category forums) but I wish to appeal to the wider community for other CentOS related RSS feeds we could look at gadgetising. I am not necessarily meaning someone who has a few centos articles on their blog - but I am meaning f...

These helpers are only for use with kernel threads, and I will tie them more into the kthread infrastructure going forward. Also move the prototypes to kthread.h - mmu_context.h was a little weird to start with as it otherwise contains very low-level MM bits. Signed-off-by: Christoph Hellwig <hch at lst.de> --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 1 +

Some architectures like arm64 and s390 require USER_DS to be set for kernel threads to access user address space, which is the whole purpose of kthread_use_mm, but other like x86 don't. That has lead to a huge mess where some callers are fixed up once they are tested on said architectures, while others linger around and yet other like io_uring try to do "clever" optimizations for

Some architectures like arm64 and s390 require USER_DS to be set for kernel threads to access user address space, which is the whole purpose of kthread_use_mm, but other like x86 don't. That has lead to a huge mess where some callers are fixed up once they are tested on said architectures, while others linger around and yet other like io_uring try to do "clever" optimizations for

Hi, Sean Silva via llvm-dev wrote: > Wouldn't a branch funnel open the door to a type 1 attack? Only if the code looks exactly as you wrote it. If I understand this correctly the problem with indirect branches is that the "gadget", the code leaking the data, could be *anywhere* in the binary, giving the attacker much more freedom. So restricting these calls to one of the

See: https://arstechnica.com/gadgets/2021/01/centos-is-gone-but-rhel-is-now-free-for-up-to-16-production-servers/ and https://www.redhat.com/en/blog/new-year-new-red-hat-enterprise-linux-programs-easier-ways-access-rhel -- J Martin Rushton MBCS

Hi, A new speculative cache side-channel vulnerability has been published at https://developer.arm.com/support/arm-security-updates/speculative-processor-vulnerability/downloads/straight-line-speculation, named "straight-line speculation”, CVE-2020-13844. In this email, I'd like to explain the toolchain mitigation we've prepared to mitigate against this vulnerability for AArch64.