Displaying 8 results from an estimated 8 matches for "fsr8rc".
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fsr8
2008 Oct 13
2
[LLVMdev] INSERT_SUBREG node.
...ef FSR0H : Register<"FSR0H">;
def FSR1L : Register<"FSR1L">;
def FSR1H : Register<"FSR1H">;
def FSR0 : RegisterWithSubRegs<"FSR0", [FSR0H, FSR0L]>;
def FSR1 : RegisterWithSubRegs<"FSR1", [FSR1H, FSR1L]>;
def FSR8RC : RegisterClass<"PIC16", [i8], 8, [FSR0L, FSR0H, FSR0L,
FSR1H]>;
def FSR16RC : RegisterClass<"PIC16", [i16], 8, [FSR0, FSR1]> {
let SubRegClassList = [FSR8RC];
}
in my case I want to insert two values, which are available in register
types of FSR8RC, into...
2008 Oct 14
0
[LLVMdev] INSERT_SUBREG node.
...;FSR0H">;
> def FSR1L : Register<"FSR1L">;
> def FSR1H : Register<"FSR1H">;
>
> def FSR0 : RegisterWithSubRegs<"FSR0", [FSR0H, FSR0L]>;
> def FSR1 : RegisterWithSubRegs<"FSR1", [FSR1H, FSR1L]>;
>
> def FSR8RC : RegisterClass<"PIC16", [i8], 8, [FSR0L, FSR0H, FSR0L,
> FSR1H]>;
>
> def FSR16RC : RegisterClass<"PIC16", [i16], 8, [FSR0, FSR1]> {
> let SubRegClassList = [FSR8RC];
> }
>
> in my case I want to insert two values, which are available in...
2008 Oct 15
2
[LLVMdev] INSERT_SUBREG node.
...R1L : Register<"FSR1L">;
> > def FSR1H : Register<"FSR1H">;
> >
> > def FSR0 : RegisterWithSubRegs<"FSR0", [FSR0H, FSR0L]>;
> > def FSR1 : RegisterWithSubRegs<"FSR1", [FSR1H, FSR1L]>;
> >
> > def FSR8RC : RegisterClass<"PIC16", [i8], 8, [FSR0L, FSR0H, FSR0L,
> > FSR1H]>;
> >
> > def FSR16RC : RegisterClass<"PIC16", [i16], 8, [FSR0, FSR1]> {
> > let SubRegClassList = [FSR8RC];
> > }
> >
> > in my case I want to insert...
2008 Oct 15
0
[LLVMdev] INSERT_SUBREG node.
...<"FSR1L">;
>>> def FSR1H : Register<"FSR1H">;
>>>
>>> def FSR0 : RegisterWithSubRegs<"FSR0", [FSR0H, FSR0L]>;
>>> def FSR1 : RegisterWithSubRegs<"FSR1", [FSR1H, FSR1L]>;
>>>
>>> def FSR8RC : RegisterClass<"PIC16", [i8], 8, [FSR0L, FSR0H, FSR0L,
>>> FSR1H]>;
>>>
>>> def FSR16RC : RegisterClass<"PIC16", [i16], 8, [FSR0, FSR1]> {
>>> let SubRegClassList = [FSR8RC];
>>> }
>>>
>>> in my case...
2008 Oct 02
0
[LLVMdev] INSERT_SUBREG node.
On Oct 2, 2008, at 11:02 AM, Sanjiv.Gupta at microchip.com wrote:
> What’s the value produced by an INSERT_SUBREG node? Is it a chain?
No, insert_subreg returns a value:
v1 = insert_subreg v2, v3, idx
v1 and v2 will have the same type, e.g. i16, and v3 must have a sub-
register type, e.g. i8.
> Can I use to set a superreg of i16 type with two i8 values, and use
> the supperreg as
2008 Oct 02
2
[LLVMdev] INSERT_SUBREG node.
What's the value produced by an INSERT_SUBREG node? Is it a chain?
Can I use to set a superreg of i16 type with two i8 values, and use the
supperreg as an operand somewhere else?
- Sanjiv
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2008 Oct 15
3
[LLVMdev] INSERT_SUBREG node.
...; >>> def FSR1H : Register<"FSR1H">;
> >>>
> >>> def FSR0 : RegisterWithSubRegs<"FSR0", [FSR0H, FSR0L]>;
> >>> def FSR1 : RegisterWithSubRegs<"FSR1", [FSR1H, FSR1L]>;
> >>>
> >>> def FSR8RC : RegisterClass<"PIC16", [i8], 8, [FSR0L, FSR0H, FSR0L,
> >>> FSR1H]>;
> >>>
> >>> def FSR16RC : RegisterClass<"PIC16", [i16], 8, [FSR0, FSR1]> {
> >>> let SubRegClassList = [FSR8RC];
> >>> }
> >&g...
2008 Oct 16
0
[LLVMdev] INSERT_SUBREG node.
...def FSR1H : Register<"FSR1H">;
>>>>>
>>>>> def FSR0 : RegisterWithSubRegs<"FSR0", [FSR0H, FSR0L]>;
>>>>> def FSR1 : RegisterWithSubRegs<"FSR1", [FSR1H, FSR1L]>;
>>>>>
>>>>> def FSR8RC : RegisterClass<"PIC16", [i8], 8, [FSR0L, FSR0H,
>>>>> FSR0L,
>>>>> FSR1H]>;
>>>>>
>>>>> def FSR16RC : RegisterClass<"PIC16", [i16], 8, [FSR0, FSR1]> {
>>>>> let SubRegClassList = [FSR8RC...