Displaying 1 result from an estimated 1 matches for "fr64regclass".
Did you mean:
gr64regclass
2007 Jul 08
0
[LLVMdev] History of register allocator and more
...it have anything that was innovative for the time of release,
etc.
Second question: I am trying to implement swaps of floating point
registers, but I do not know how to do it. I am basically trying something
like:
// r1 and r2 are unsigned of either class X86::FR32RegClass
// or X86::FR64RegClass
unsigned Opc = X86::FXCH;
BuildMI(mbb, mi, Opc, 1).addReg(r1);
BuildMI(mbb, mi, Opc, 1).addReg(r2);
BuildMI(mbb, mi, Opc, 1).addReg(r1);
This produces code like: "fxch %xmm0", that gcc does not compile. Could
some generous soul shed some light on my misery?
best,
F...