search for: fpuaboffsetclass

...oo t2, t6 But there is one small issue in the inference of RegisterClass of the implicitly defined register. As shown below, the %vreg6<def> is implicitly defined as FPUabRegisterClass. This register class accepts the v2f32 type, but for others addressing mode context this register should be FPUabOffsetClass. Is there a mechanism, an option to inforce/control the RegisterClass of registers defined by IMPLICIT_DEF ? # Machine code for function vector2floatMulSum: SSA Function Live Ins: %FA_ROFF1 in %vreg0, %FA_ROFF2 in %vreg1 BB#0: derived from LLVM BB %entry Live Ins: %FA_ROFF1 %FA_ROFF2...

...issue in the inference of RegisterClass of the > implicitly defined register. > > As shown below, the %vreg6<def> is implicitly defined as FPUabRegisterClass. > > This register class accepts the v2f32 type, but for others addressing > mode context this register should be FPUabOffsetClass. > > Is there a mechanism, an option to inforce/control the RegisterClass of > registers defined by IMPLICIT_DEF ? A virtual register has a specific register class assigned to it, and is implicitly a member of any superclass of that class. If you want to use the register in a place th...

...%6:fpuaoffsetclass = COPY %fab_roff0; FPUaOffsetClass:%6 # preds left : 0 # succs left : 1 # rdefs left : 0 Latency : 0 Depth : 0 Height : 25 Successors: SU(21): Data Latency=0 Reg=%6 Pressure Diff : FPUaOffsetClass -1 FPUabOffsetClass -1 Single Issue : false; [http://www.spacebel.be/wp-content/uploads/2011/06/image-sign-sbp.jpg] Dominique Torette System Architect Rue des Chasseurs Ardennais - Liège Science Park - B-4031 Angleur Tel: +32 (0) 4 361 81 11 - Fax: +32 (0) 4 361 81 20 www.spacebel.be<http://www.spaceb...