Displaying 20 results from an estimated 41 matches for "flush_tlb_page".
2007 May 22
1
Kernel Panic in wct4xxp during unload on Zaptel-1.4.4
...lt;5> <ffffffff801131c4>{do_IRQ+197}
<ffffffff80110833>{ret_from_intr+0}
<5> <ffffffff8013c731>{__do_softirq+77}
<ffffffff8013c7e5>{do_softirq+49}
<5> <ffffffff80110bf5>{apic_timer_interrupt+133} <EOI>
<ffffffff8011c21a>{flush_tlb_page+44}
<5> <ffffffff80169106>{do_wp_page+1127}
<ffffffff80123ed3>{do_page_fault+575}
<5> <ffffffff80169ff2>{handle_mm_fault+1228}
<ffffffff80123e9a>{do_page_fault+518}
<5> <ffffffff8011026a>{system_call+126}
<ffffffff80132bc6>{...
2007 Apr 18
0
[PATCH 4/5] Fix bad mmu names.patch
...+ b/include/asm-i386/pgtable.h Thu Oct 19 03:11:31 2006 -0700
@@ -275,7 +275,7 @@ do { \
do { \
if (dirty) { \
(ptep)->pte_low = (entry).pte_low; \
- pte_update_defer((vma)->vm_mm, (addr), (ptep)); \
+ pte_update_defer((vma)->vm_mm, (address), (ptep)); \
flush_tlb_page(vma, address); \
} \
} while (0)
@@ -305,7 +305,7 @@ do { \
__dirty = pte_dirty(*(ptep)); \
if (__dirty) { \
clear_bit(_PAGE_BIT_DIRTY, &(ptep)->pte_low); \
- pte_update_defer((vma)->vm_mm, (addr), (ptep)); \
+ pte_update_defer((vma)->vm_mm, (a...
2007 Apr 18
0
[PATCH 4/5] Fix bad mmu names.patch
...+ b/include/asm-i386/pgtable.h Thu Oct 19 03:11:31 2006 -0700
@@ -275,7 +275,7 @@ do { \
do { \
if (dirty) { \
(ptep)->pte_low = (entry).pte_low; \
- pte_update_defer((vma)->vm_mm, (addr), (ptep)); \
+ pte_update_defer((vma)->vm_mm, (address), (ptep)); \
flush_tlb_page(vma, address); \
} \
} while (0)
@@ -305,7 +305,7 @@ do { \
__dirty = pte_dirty(*(ptep)); \
if (__dirty) { \
clear_bit(_PAGE_BIT_DIRTY, &(ptep)->pte_low); \
- pte_update_defer((vma)->vm_mm, (addr), (ptep)); \
+ pte_update_defer((vma)->vm_mm, (a...
2007 Apr 18
0
[PATCH 9/9] 00mme update pte hook.patch
...* the dirty bit by hand in the kernel, since the hardware
* will do the accessed bit for us, and we don't want to
@@ -258,6 +275,7 @@ do { \
do { \
if (dirty) { \
(ptep)->pte_low = (entry).pte_low; \
+ pte_update_defer((vma)->vm_mm, (addr), (ptep)); \
flush_tlb_page(vma, address); \
} \
} while (0)
@@ -287,6 +305,7 @@ do { \
__dirty = pte_dirty(*(ptep)); \
if (__dirty) { \
clear_bit(_PAGE_BIT_DIRTY, &(ptep)->pte_low); \
+ pte_update_defer((vma)->vm_mm, (addr), (ptep)); \
flush_tlb_page(vma, address); \...
2003 Oct 07
2
Compile problem SuSE 8.2
...c/linux/include/linux/vmalloc.h:8,
from /usr/src/linux/include/asm/io.h:47,
from /usr/src/linux/include/asm/pci.h:40,
from /usr/src/linux/include/linux/pci.h:654,
from zaptel.c:38:
/usr/src/linux/include/asm/pgalloc.h: In function `flush_tlb_page':
/usr/src/linux/include/asm/pgalloc.h:201: internal compiler error:
Segmentation fault
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://www.gnu.org/software/gcc/bugs.html> for instructions.
make: *** [zaptel.o] Error 1
****************************...
2007 Apr 18
0
[PATCH 4/9] 00mm5 combine flush accessed dirty.patch
...CCESSED, &ptep->pte_low);
-}
+
+#define __HAVE_ARCH_PTEP_CLEAR_DIRTY_FLUSH
+#define ptep_clear_flush_dirty(vma, address, ptep) \
+({ \
+ int __dirty; \
+ __dirty = pte_dirty(*(ptep)); \
+ if (__dirty) { \
+ clear_bit(_PAGE_BIT_DIRTY, &(ptep)->pte_low); \
+ flush_tlb_page(vma, address); \
+ } \
+ __dirty; \
+})
+
+#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
+#define ptep_clear_flush_young(vma, address, ptep) \
+({ \
+ int __young; \
+ __young = pte_young(*(ptep)); \
+ if (__young) { \
+ clear_bit(_PAGE_BIT_ACCESSED, &(pt...
2007 Apr 18
0
[PATCH 7/9] 00mma remove set pte atomic.patch
...: the old pte is known to not be writable, so we don't need to
* worry about dirty bits etc getting lost.
*/
-#ifndef __HAVE_ARCH_SET_PTE_ATOMIC
#define ptep_establish(__vma, __address, __ptep, __entry) \
do { \
set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \
flush_tlb_page(__vma, __address); \
} while (0)
-#else /* __HAVE_ARCH_SET_PTE_ATOMIC */
-#define ptep_establish(__vma, __address, __ptep, __entry) \
-do { \
- set_pte_atomic(__ptep, __entry); \
- flush_tlb_page(__vma, __address); \
-} while (0)
-#endif /* __HAVE_ARCH_SET_PTE_ATOMIC */
#endif...
2007 Apr 18
1
[PATCH 6/9] 00mm9 optimize ptep establish for pae.patch
...NG
+/*
+ * Rules for using ptep_establish: the pte MUST be a user pte, and
+ * must be a present->present transition.
+ */
+#define __HAVE_ARCH_PTEP_ESTABLISH
+#define ptep_establish(vma, address, ptep, pteval) \
+do { \
+ set_pte_present((vma)->vm_mm, address, ptep, pteval); \
+ flush_tlb_page(vma, address); \
+} while (0)
+
#define __HAVE_ARCH_PTEP_CLEAR_DIRTY_FLUSH
#define ptep_clear_flush_dirty(vma, address, ptep) \
({ \
2010 Mar 30
1
How are your PRI interrupts balanced? (+ Soft lockup BUG)
...to_user+0x31/0x48
Mar 29 09:38:24 pstn1 kernel: [<f89ab141>] zt_chan_read+0x1e0/0x20b [zaptel]
Mar 29 09:38:24 pstn1 kernel: [<c04ea195>] copy_from_user+0x31/0x5d
Mar 29 09:38:24 pstn1 kernel: [<c05ac4c4>] sys_sendto+0x116/0x140
Mar 29 09:38:24 pstn1 kernel: [<c0415d4f>] flush_tlb_page+0x74/0x77
Mar 29 09:38:24 pstn1 kernel: [<c0461331>] do_wp_page+0x3bf/0x40a
Mar 29 09:38:24 pstn1 kernel: [<c04284f1>] current_fs_time+0x4a/0x55
Mar 29 09:38:24 pstn1 kernel: [<c0488f9b>] touch_atime+0x60/0x91
Mar 29 09:38:24 pstn1 kernel: [<c047d9d0>] pipe_readv+0x315/0...
2019 Jul 19
0
[PATCH v3 4/9] x86/mm/tlb: Flush remote and local TLBs concurrently
...void *table);
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index dee375831962..610e47dc66ef 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -517,7 +517,7 @@ static inline void __flush_tlb_one_kernel(unsigned long addr)
* - flush_tlb_page(vma, vmaddr) flushes one page
* - flush_tlb_range(vma, start, end) flushes a range of pages
* - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
- * - flush_tlb_others(cpumask, info) flushes TLBs on other cpus
+ * - flush_tlb_multi(cpumask, info) flushes TLBs on multiple c...
2019 Jul 02
0
[PATCH v2 4/9] x86/mm/tlb: Flush remote and local TLBs concurrently
...void *table);
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index dee375831962..36aa2a9b7597 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -517,7 +517,7 @@ static inline void __flush_tlb_one_kernel(unsigned long addr)
* - flush_tlb_page(vma, vmaddr) flushes one page
* - flush_tlb_range(vma, start, end) flushes a range of pages
* - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
- * - flush_tlb_others(cpumask, info) flushes TLBs on other cpus
+ * - flush_tlb_multi(cpumask, info) flushes TLBs on multiple c...
2007 Apr 18
1
[RFC, PATCH 19/24] i386 Vmi mmu changes
...p))
@@ -281,6 +289,15 @@ static inline void ptep_set_wrprotect(st
clear_bit(_PAGE_BIT_RW, &ptep->pte_low);
}
+#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
+ do { \
+ if (__dirty) { \
+ (__ptep)->pte_low = (__entry).pte_low; \
+ flush_tlb_page(__vma, __address); \
+ } \
+ } while (0)
+#endif /* !__HAVE_SUBARCH_PTE_WRITE_FUNCTIONS */
+
/*
* clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
*
@@ -397,11 +414,26 @@ extern pte_t *lookup_address(unsigned lo
extern void noexec_setup(const char *str);
+#include <asm/p...
2007 Apr 18
1
[RFC, PATCH 19/24] i386 Vmi mmu changes
...p))
@@ -281,6 +289,15 @@ static inline void ptep_set_wrprotect(st
clear_bit(_PAGE_BIT_RW, &ptep->pte_low);
}
+#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
+ do { \
+ if (__dirty) { \
+ (__ptep)->pte_low = (__entry).pte_low; \
+ flush_tlb_page(__vma, __address); \
+ } \
+ } while (0)
+#endif /* !__HAVE_SUBARCH_PTE_WRITE_FUNCTIONS */
+
/*
* clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
*
@@ -397,11 +414,26 @@ extern pte_t *lookup_address(unsigned lo
extern void noexec_setup(const char *str);
+#include <asm/p...
2019 Jun 13
4
[PATCH 4/9] x86/mm/tlb: Flush remote and local TLBs concurrently
...struct cpumask *cpus,
const struct flush_tlb_info *info);
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index dee375831962..79272938cf79 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -569,6 +569,9 @@ static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long a)
flush_tlb_mm_range(vma->vm_mm, a, a + PAGE_SIZE, PAGE_SHIFT, false);
}
+void native_flush_tlb_multi(const struct cpumask *cpumask,
+ const struct flush_tlb_info *info);
+
void native_flush_tlb_others(const struct cpumask *cpumask,...
2019 Jun 13
4
[PATCH 4/9] x86/mm/tlb: Flush remote and local TLBs concurrently
...struct cpumask *cpus,
const struct flush_tlb_info *info);
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index dee375831962..79272938cf79 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -569,6 +569,9 @@ static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long a)
flush_tlb_mm_range(vma->vm_mm, a, a + PAGE_SIZE, PAGE_SHIFT, false);
}
+void native_flush_tlb_multi(const struct cpumask *cpumask,
+ const struct flush_tlb_info *info);
+
void native_flush_tlb_others(const struct cpumask *cpumask,...
2019 Jul 02
2
[PATCH v2 0/9] x86: Concurrent TLB flushes
Currently, local and remote TLB flushes are not performed concurrently,
which introduces unnecessary overhead - each INVLPG can take 100s of
cycles. This patch-set allows TLB flushes to be run concurrently: first
request the remote CPUs to initiate the flush, then run it locally, and
finally wait for the remote CPUs to finish their work.
In addition, there are various small optimizations to avoid
2019 Jul 19
5
[PATCH v3 0/9] x86: Concurrent TLB flushes
[ Cover-letter is identical to v2, including benchmark results,
excluding the change log. ]
Currently, local and remote TLB flushes are not performed concurrently,
which introduces unnecessary overhead - each INVLPG can take 100s of
cycles. This patch-set allows TLB flushes to be run concurrently: first
request the remote CPUs to initiate the flush, then run it locally, and
finally wait for
2019 Jun 25
0
[PATCH 4/9] x86/mm/tlb: Flush remote and local TLBs concurrently
...nst struct flush_tlb_info *info);
>
> diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
> index dee375831962..79272938cf79 100644
> --- a/arch/x86/include/asm/tlbflush.h
> +++ b/arch/x86/include/asm/tlbflush.h
> @@ -569,6 +569,9 @@ static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long a)
> flush_tlb_mm_range(vma->vm_mm, a, a + PAGE_SIZE, PAGE_SHIFT, false);
> }
>
> +void native_flush_tlb_multi(const struct cpumask *cpumask,
> + const struct flush_tlb_info *info);
> +
> void native_flush_tlb_others(con...
2010 Aug 05
0
[GIT PULL] x86/mm for 2.6.36
...",
size >> 10, mmio_address);
do_test(size);
+ do_test_bulk_ioremapping();
pr_info("All done.\n");
return 0;
}
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 426f3a1..c03f14a 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -278,11 +278,9 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
static void do_flush_tlb_all(void *info)
{
- unsigned long cpu = smp_processor_id();
-
__flush_tlb_all();
if (percpu_read(cpu_tlbstate.state) == TLBSTATE_LAZY)
- leave_mm(cpu);
+ leave_mm(smp_processor_id());
}
void flush_tlb_all(void)
dif...
2015 Feb 16
2
Intermittent problem, likely disk IO related - mptscsih: ioc0: attempting task abort!
...0
Feb 16 06:06:56 ffffffff810522e6
Feb 16 06:06:56 192.168.13.230
Feb 16 06:06:56 Call Trace:
Feb 16 06:06:56 [<ffffffff81052268>] ? flush_tlb_others_ipi+0x128/0x130
Feb 16 06:06:56 [<ffffffff810522e6>] ? native_flush_tlb_others+0x76/0x90
Feb 16 06:06:56 [<ffffffff8105240e>] ? flush_tlb_page+0x5e/0xb0
Feb 16 06:06:56 [<ffffffff811721c2>] ? try_to_merge_with_ksm_page+0x532/0x660
Feb 16 06:06:56 [<ffffffff811731a4>] ? ksm_scan_thread+0xeb4/0x1120
Feb 16 06:06:56 [<ffffffff8109eb00>] ? autoremove_wake_function+0x0/0x40
Feb 16 06:06:56 [<ffffffff811722f0>] ? ksm...