Displaying 2 results from an estimated 2 matches for "fixedstack6".
Did you mean:
fixedstack
2016 Jul 30
1
Instruction selection bug for vector store with FixedStack
Hello.
Could you please help me solve the following LLC bug happening at instruction
selection time:
ISEL: Starting pattern match on root node: t172: ch = store<ST64[FixedStack6]>
t0, t6, FrameIndex:i64<6>, undef:i64
Initial Opcode index to 157
Skipped scope entry (due to false predicate) at index 162, continuing at 236
Match failed at index 241
Continuing at 263
LLVM ERROR: Cannot select: t172: ch = store<...
2013 May 13
1
[LLVMdev] Problem with MachineFunctionPass and JMP
...ALL64pcrel32 <ga:@printf>, <regmask>, %RSP<imp-use>, %AL<imp-use,kill>, %RDI<imp-use,kill>, %EAX<imp-def>
ADJCALLSTACKUP64 0, 0, %RSP<imp-def>, %EFLAGS<imp-def>, %RSP<imp-use>
MOV32mr <fi#6>, 1, %noreg, 0, %noreg, %EAX<kill>; mem:ST4[FixedStack6]
JMP_4 <BB#3>
entry BB#0
MOV32mi <fi#0>, 1, %noreg, 0, %noreg, 0
MOV32mr <fi#1>, 1, %noreg, 0, %noreg, %EDI<kill>
MOV64mr <fi#2>, 1, %noreg, 0, %noreg, %RSI<kill>
MOV32mi <fi#3>, 1, %noreg, 0, %noreg, 0
MOV32mi <fi#4>, 1, %noreg, 0, %noreg, 4
%EDI<...