search for: fixedstack27

Displaying 3 results from an estimated 3 matches for "fixedstack27".

Did you mean: fixedstack2
2011 Dec 05
3
[LLVMdev] Dead register (was Re: [llvm-commits] [llvm] r145819)
RegScavenger is complaining about use of an undefined register, CTR8, in the BCTR8 instruction, in the following instance (this is from the PPC backend): BB#38: derived from LLVM BB %for.end50 Predecessors according to CFG: BB#36 %X3<def> = LD 0, <fi#27>; mem:LD8[FixedStack27] %X4<def> = RLDICR %X3<kill>, 3, 60 %X5<def> = LI8 <jt#0>[TF=4] %X5<def> = ADDIS8 %X5<kill>, <jt#0>[TF=8] %X4<def> = LDX %X4<kill>, %X5<kill>; mem:LD8[JumpTable] MTCTR8 %X4<kill>, %CTR8<imp-...
2011 Dec 05
0
[LLVMdev] Dead register (was Re: [llvm-commits] [llvm] r145819)
...omplaining about use of an undefined register, CTR8, in > the BCTR8 instruction, in the following instance (this is from the PPC > backend): > > BB#38: derived from LLVM BB %for.end50 > Predecessors according to CFG: BB#36 > %X3<def> = LD 0, <fi#27>; mem:LD8[FixedStack27] > %X4<def> = RLDICR %X3<kill>, 3, 60 > %X5<def> = LI8 <jt#0>[TF=4] > %X5<def> = ADDIS8 %X5<kill>, <jt#0>[TF=8] > %X4<def> = LDX %X4<kill>, %X5<kill>; mem:LD8[JumpTable] > MTCTR8 %X4<kil...
2011 Dec 06
2
[LLVMdev] Dead register (was Re: [llvm-commits] [llvm] r145819)
...efined register, CTR8, in > > the BCTR8 instruction, in the following instance (this is from the PPC > > backend): > > > > BB#38: derived from LLVM BB %for.end50 > > Predecessors according to CFG: BB#36 > > %X3<def> = LD 0, <fi#27>; mem:LD8[FixedStack27] > > %X4<def> = RLDICR %X3<kill>, 3, 60 > > %X5<def> = LI8 <jt#0>[TF=4] > > %X5<def> = ADDIS8 %X5<kill>, <jt#0>[TF=8] > > %X4<def> = LDX %X4<kill>, %X5<kill>; mem:LD8[JumpTable] > >...