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...o check whether the %evl parameter is inactivated in this way (VPIntrinsic::canIgnoreVectorLengthParam()). Cheers, Sjoerd. - Simon ________________________________ From: Simon Moll <Simon.Moll at EMEA.NEC.COM><mailto:Simon.Moll at EMEA.NEC.COM> Sent: 06 November 2020 10:07 To: Roger Ferrer Ibáñez <rofirrim at gmail.com><mailto:rofirrim at gmail.com>; Sjoerd Meijer <Sjoerd.Meijer at arm.com><mailto:Sjoerd.Meijer at arm.com> Cc: Renato Golin <rengolin at gmail.com><mailto:rengolin at gmail.com>; Vineet Kumar <vineet.kumar at bsc.es><mailto:v...

Dear Alex, all, I was looking for fcvt.d.{w,l}{,u} in RISCVInstrInfoD and I'm not sure to understand the current definitions: 138 def FCVT_D_W : FPUnaryOp_r<0b1101001, 0b000, FPR64, GPR, "fcvt.d.w"> { 139 let rs2 = 0b00000; 140 } 141 142 def FCVT_D_WU : FPUnaryOp_r<0b1101001, 0b000, FPR64, GPR, "fcvt.d.wu"> { 143 let rs2 =

>i wasn't thinking of crack solutions, i was thinking of a way of merging >unix and nt logins. but then realised that that is simply not possible. >except with PAMs. >lukes i wonder that nobody is talking about LDAP servers?! Unix vendors are close to have "ldap" in nsswitch.conf (with "files" "nis" ..) and there is "ypldapd" as another

...the case? Thanks, Chris Tetreault From: llvm-dev <llvm-dev-bounces at lists.llvm.org<mailto:llvm-dev-bounces at lists.llvm.org>> On Behalf Of Kai Wang via llvm-dev Sent: Tuesday, April 7, 2020 1:31 AM To: llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org> Cc: Roger Ferrer Ibanez <roger.ferrer at bsc.es<mailto:roger.ferrer at bsc.es>>; rengolin at gmail.co<mailto:rengolin at gmail.co>; robin.kruppe at gmail.com<mailto:robin.kruppe at gmail.com> Subject: [EXT] [llvm-dev] Questions about vscale Hi, In RISC-V v-extension, operations could op...

...targets I think; we don't need many cases. And kind of similarly, vscale can be a no-op or do something. Cheers, Sjoerd. ________________________________ From: Simon Moll <Simon.Moll at EMEA.NEC.COM> Sent: 06 November 2020 15:37 To: Sjoerd Meijer <Sjoerd.Meijer at arm.com>; Roger Ferrer Ibáñez <rofirrim at gmail.com> Cc: Renato Golin <rengolin at gmail.com>; Vineet Kumar <vineet.kumar at bsc.es>; LLVM Dev <llvm-dev at lists.llvm.org>; ROGER FERRER IBANEZ <roger.ferrer at bsc.es>; Arai, Masaki <arai.masaki at jp.fujitsu.com> Subject: Re: [llvm-de...

...-d%p %s; rm %s [root] comment = Root path = / [Pron] comment = Private path = /var/pron [sun-printer] path = /tmp printer admin = gary guest ok = Yes printable = Yes printer name = deskjet printer driver file = Gary Ferrer gary@ferrer.yi.org -------------- next part -------------- HTML attachment scrubbed and removed

On 11/6/20 8:49 AM, Roger Ferrer Ibáñez wrote: Hi Sjoerd, Trying to remember how everything fits together here, but could get.active.lane.mask not create the %mask of the VP intrinsics? Or in other words, in the vectoriser, who's producing the %mask and %evl that is consumed by the VP intrinsics? I'm not sure what would...

Yep, exactly that. We see quite a lot of them, most of them get cleaned up, but not always... Cheers. ________________________________ From: Roger Ferrer Ibáñez <rofirrim at gmail.com> Sent: 16 March 2020 08:53 To: Sjoerd Meijer <Sjoerd.Meijer at arm.com> Cc: LLVM-Dev <llvm-dev at lists.llvm.org>; Sam Parker <Sam.Parker at arm.com> Subject: Re: [llvm-dev] Redundant copies At this point however it doesn't (obviously) loo...

...embler would need some extra magic (i.e. when assembling a "call" pseudoinstruction with -fPIC) so they don't end being parsed as the non-PIC counterparts. I might be wrong here though. Is this reasonable or there are other downsides to consider here? Thank you very much, -- Roger Ferrer Ibáñez -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180710/cbf1c638/attachment.html>

...to W2, so the following should be OK (however RegAlloc would never make such an assignment under earlyclobber) W2 = widen-op W2, N3 In principle earlyclobber is always going to do allocations that are correct for the target but there are a valid ones that will be missed. Kind regards, -- Roger Ferrer Ibáñez -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20200505/d6a4a207/attachment.html>

...r debug info you need. I haven't pasted the regalloc debug info here because it is quite huge, but if you tell me what specific details you need I will include them. Thanks for your help! 2012/7/14 Jakob Stoklund Olesen <stoklund at 2pi.dk> > > On Jul 14, 2012, at 10:09 AM, Borja Ferrer <borja.ferav at gmail.com> wrote: > > > Hello, > > > > I'm getting a machine verifier error after introducing the earlyclobber > constraint to some instructions where the src and dest regs can't be the > same. The offending instruction pattern is this one: &...

Hello Jakob, Did you get a chance to take a look into this, and if not, can you do it when you get some spare time? Thanks! 2012/12/19 Borja Ferrer <borja.ferav at gmail.com> > We did something like this back when the register allocator couldn't split >> live ranges. >> > > Yes, I remember the isWinToJoinCrossClass() function, removed here: > > http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/Reg...

Jakob, one more hint, I've placed some asserts around the code you added and noticed that the InlineSpiller::insertReload() function is not being called. 2012/7/14 Borja Ferrer <borja.ferav at gmail.com> > Hello Jakob, > > I'm still getting the error, I can give you any other debug info you need. > I haven't pasted the regalloc debug info here because it is quite huge, but > if you tell me what specific details you need I will include them. &...

did U use : smbpasswd -a user th passwd must be the same rick. >From: "Gary Ferrer" <gary@ferrer.yi.org> >To: "Samba-users" <samba@lists.samba.org> >Subject: [Samba] (no subject) >Date: Fri, 22 Feb 2002 00:07:04 -0800 > >Hi people, sorry for the previous HTML stuff, I hope this time it's plain >text. Here's my problem: > &g...

...us case: if we see a copy with the same physregs in dest and source to an earlier one and the reaching definition of the dest and source registers is one and the same, then that copy should be redundant. This might be too specific though, so perhaps there are better approaches? Thanks! -- Roger Ferrer Ibáñez -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20200312/ecc0e034/attachment.html>

On Jan 7, 2013, at 4:58 AM, Borja Ferrer <borja.ferav at gmail.com> wrote: > Hello Jakob, > > Did you get a chance to take a look into this, and if not, can you do it when you get some spare time? It's not likely I'll have time to look at this in the near future. I'd recommend you do it yourself. /jakob &g...

...sk(%i, %i) ; %evl = call @llvm.vscale(256, %n - %i) ; MVE/SVE/AVX : ; %mask = get.active.lane.mask(%i, %n) ; %evl = call @llvm.vscale(... ,..) Cheers, Sjoerd. ________________________________ From: Simon Moll <Simon.Moll at EMEA.NEC.COM> Sent: 06 November 2020 10:07 To: Roger Ferrer Ibáñez <rofirrim at gmail.com>; Sjoerd Meijer <Sjoerd.Meijer at arm.com> Cc: Renato Golin <rengolin at gmail.com>; Vineet Kumar <vineet.kumar at bsc.es>; LLVM Dev <llvm-dev at lists.llvm.org>; ROGER FERRER IBANEZ <roger.ferrer at bsc.es>; Arai, Masaki <arai.ma...

...ot create the %mask of the VP intrinsics? Or in other words, in the vectoriser, who's producing the %mask and %evl that is consumed by the VP intrinsics? Cheers, Sjoerd. ________________________________ From: Simon Moll <Simon.Moll at EMEA.NEC.COM> Sent: 05 November 2020 11:07 To: Roger Ferrer Ibáñez <rofirrim at gmail.com>; Sjoerd Meijer <Sjoerd.Meijer at arm.com> Cc: Renato Golin <rengolin at gmail.com>; Vineet Kumar <vineet.kumar at bsc.es>; LLVM Dev <llvm-dev at lists.llvm.org>; ROGER FERRER IBANEZ <roger.ferrer at bsc.es>; Arai, Masaki <arai.ma...

...ther case, in the meantime, I can live with this workaround until an official fix is implemented. I'll fill in a bug report to track this problem so you can take a look at it when appropiate. 2013/1/7 Jakob Stoklund Olesen <stoklund at 2pi.dk> > > On Jan 7, 2013, at 4:58 AM, Borja Ferrer <borja.ferav at gmail.com> wrote: > > Hello Jakob, > > Did you get a chance to take a look into this, and if not, can you do it > when you get some spare time? > > > It's not likely I'll have time to look at this in the near future. I'd > recommend you d...

...the `Wdest = widen-op Wsrc1, Nsrc2` case because RA will never assign registers as in: W1 = widen-op W1, N4 [RegAlloc would do something like W3 = widen-op W1, N4] Has anyone encountered a similar situation? Perhaps all this can be modelled in a more obvious way? Thank you very much, -- Roger Ferrer Ibáñez -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20200504/4b9d7b03/attachment.html>