Dear Alex, all,
I was looking for fcvt.d.{w,l}{,u} in RISCVInstrInfoD and I'm not sure to
understand the current definitions:
138 def FCVT_D_W : FPUnaryOp_r<0b1101001, 0b000, FPR64, GPR,
"fcvt.d.w"> {
139 let rs2 = 0b00000;
140 }
141
142 def FCVT_D_WU : FPUnaryOp_r<0b1101001, 0b000, FPR64, GPR,
"fcvt.d.wu"> {
143 let rs2 = 0b00001;
144 }
162 def FCVT_D_L : FPUnaryOp_r_frm<0b1101001, FPR64, GPR,
"fcvt.d.l">
{
163 let rs2 = 0b00010;
164 }
165 def : FPUnaryOpDynFrmAlias<FCVT_D_L, "fcvt.d.l",
FPR64,
GPR>;
166
167 def FCVT_D_LU : FPUnaryOp_r_frm<0b1101001, FPR64, GPR,
"fcvt.d.lu">
{
168 let rs2 = 0b00011;
169 }
I would expect FCVT_D_W and FCVT_D_WU to be FPUnaryOp_r_frm instead of
FPUnaryOp_r. Currently they seem to hard code the rounding mode to 0b000.
Is my understanding correct or I'm missing something?
Thank you very much,
Roger
-------------- next part --------------
An HTML attachment was scrubbed...
URL:
<http://lists.llvm.org/pipermail/llvm-dev/attachments/20180828/1a35d0e3/attachment.html>
Roger Ferrer Ibáñez via llvm-dev
2018-Aug-28 07:08 UTC
[llvm-dev] [RISCV] Discrepancy between FCVT_D_{W, WU} and FCVT_D_{L, LU}
(This time with subject, sorry) Missatge de Roger Ferrer Ibáñez <rofirrim at gmail.com> del dia dt., 28 d’ag. 2018 a les 9:07:> Dear Alex, all, > > I was looking for fcvt.d.{w,l}{,u} in RISCVInstrInfoD and I'm not sure to > understand the current definitions: > > 138 def FCVT_D_W : FPUnaryOp_r<0b1101001, 0b000, FPR64, GPR, > "fcvt.d.w"> { > 139 let rs2 = 0b00000; > 140 } > 141 > 142 def FCVT_D_WU : FPUnaryOp_r<0b1101001, 0b000, FPR64, GPR, > "fcvt.d.wu"> { > 143 let rs2 = 0b00001; > 144 } > > 162 def FCVT_D_L : FPUnaryOp_r_frm<0b1101001, FPR64, GPR, > "fcvt.d.l"> { > 163 let rs2 = 0b00010; > 164 } > 165 def : FPUnaryOpDynFrmAlias<FCVT_D_L, "fcvt.d.l", FPR64, > GPR>; > 166 > 167 def FCVT_D_LU : FPUnaryOp_r_frm<0b1101001, FPR64, GPR, " > fcvt.d.lu"> { > 168 let rs2 = 0b00011; > 169 } > > > I would expect FCVT_D_W and FCVT_D_WU to be FPUnaryOp_r_frm instead of > FPUnaryOp_r. Currently they seem to hard code the rounding mode to 0b000. > > Is my understanding correct or I'm missing something? > > Thank you very much, > Roger >-- Roger Ferrer Ibáñez -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180828/ba858918/attachment.html>
Roger Ferrer Ibáñez via llvm-dev
2018-Aug-28 10:16 UTC
[llvm-dev] [RISCV] Discrepancy between FCVT_D_{W, WU} and FCVT_D_{L, LU}
Answering myself here :) Per the spec: instructions FCVT.D.W and FCVT.D.WU are unaffected by the rounding mode because they always produce exact results. Kind regards, Missatge de Roger Ferrer Ibáñez <rofirrim at gmail.com> del dia dt., 28 d’ag. 2018 a les 9:08:> (This time with subject, sorry) > > Missatge de Roger Ferrer Ibáñez <rofirrim at gmail.com> del dia dt., 28 > d’ag. 2018 a les 9:07: > >> Dear Alex, all, >> >> I was looking for fcvt.d.{w,l}{,u} in RISCVInstrInfoD and I'm not sure to >> understand the current definitions: >> >> 138 def FCVT_D_W : FPUnaryOp_r<0b1101001, 0b000, FPR64, GPR, >> "fcvt.d.w"> { >> 139 let rs2 = 0b00000; >> 140 } >> 141 >> 142 def FCVT_D_WU : FPUnaryOp_r<0b1101001, 0b000, FPR64, GPR, >> "fcvt.d.wu"> { >> 143 let rs2 = 0b00001; >> 144 } >> >> 162 def FCVT_D_L : FPUnaryOp_r_frm<0b1101001, FPR64, GPR, >> "fcvt.d.l"> { >> 163 let rs2 = 0b00010; >> 164 } >> 165 def : FPUnaryOpDynFrmAlias<FCVT_D_L, "fcvt.d.l", >> FPR64, GPR>; >> 166 >> 167 def FCVT_D_LU : FPUnaryOp_r_frm<0b1101001, FPR64, GPR, " >> fcvt.d.lu"> { >> 168 let rs2 = 0b00011; >> 169 } >> >> >> I would expect FCVT_D_W and FCVT_D_WU to be FPUnaryOp_r_frm instead of >> FPUnaryOp_r. Currently they seem to hard code the rounding mode to 0b000. >> >> Is my understanding correct or I'm missing something? >> >> Thank you very much, >> Roger >> > > > -- > Roger Ferrer Ibáñez >-- Roger Ferrer Ibáñez -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180828/55006be7/attachment.html>