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Displaying 3 results from an estimated 3 matches for "fd30fddc".

2007 Jun 13
1
[LLVMdev] PR1350 (Vreg subregs) questions
...t > doesn't derive from std::pair. By a value class do you mean a subclass of Value or just a class with no superclass? -- Christopher Lamb -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20070613/fd30fddc/attachment.html>
2007 Jun 13
0
[LLVMdev] PR1350 (Vreg subregs) questions
On Tue, 12 Jun 2007, Christopher Lamb wrote: >> > > > When should subregs be flattened to actual registers: AsmPrinter? >> > > > Somewhere in LiveIntervals, during RegAlloc? >> >> This should definitely be done during regalloc. > > It seems that LiveIntervals will need to be taught about the new form of > virtual registers. Hrm. I'm
2007 Jun 13
2
[LLVMdev] PR1350 (Vreg subregs) questions
On Jun 12, 2007, at 10:53 AM, Chris Lattner wrote: > On Tue, 12 Jun 2007, Christopher Lamb wrote: >>>> What's the best way to get an SDNode through to DAG scheduling >>>> without getting mangled during Lowering/ISel? >>> >>> What do you mean by "mangled"? Please clarify. >> >> My mangled I mean the nodes shouldn't be