search for: fcmps

...ons, C99 functions like isgreater will not work correctly with > NAN's. How do I know when to use a trapping instruction? For example consider this C function: ------------------------ int f(float a, float b) { return a <= b; } ------------------------ gcc uses fcmpes instead of fcmps... > -Chris Thanks, Rafael

.../ Returns one iff a <= b and neither is NaN. // Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // DEFINE_COMPILERRT_FUNCTION(__lesf2vfp) fmsr s14, r0 // move from GPR 0 to float register fmsr s15, r1 // move from GPR 1 to float register fcmps s14, s15 fmstat movls r0, #1 // set result register to 1 if equal movhi r0, #0 bx lr If I read this right, the high bits of r0 are always cleared (by the movhi) while the low bits are conditionally set to 1 (by the movls), but there's nothing to clear the r0's low bits in the fals...

Hey guys, I've come across a bug when combining an AND of FCMPs. This bug occurs in my compiler as well as Clang built from trunk. A reduced test case is: int foo( float a, double b ) { return (a == a) & (b == b); } and the error is: Assertion failed: (getOperand(0)->getType() == getOperand(1)->getType() && "Both operands to FCmp in...

...ere single precision arguments are passsed > > // like 32-bit ints > > // > > DEFINE_COMPILERRT_FUNCTION(__lesf2vfp) > > fmsr s14, r0 // move from GPR 0 to float register > > fmsr s15, r1 // move from GPR 1 to float register > > fcmps s14, s15 > > fmstat > > movls r0, #1 // set result register to 1 if equal > > movhi r0, #0 > > bx lr > > If I read this right, the high bits of r0 are always cleared (by the > movhi) while the low bits are conditionally s...

...ion register op3 = opcode rs1 = source register 1 opf = opcode (floating-point) rs2 = source register 2 So far so good. However, some operations ignore some instruction parts (for example, FABSS aka single-precision floating absolute value ignores rs1 because it is by nature a unary operation, and FCMPS aka single-precision floating compare ignores rd because it only sets flags). Sadly, this confuses TableGen, which doesn't know how to fill the "remaining" registers, and segfaults due to complications from an out-of-bounds array access. How am I to handle this? I thought about creat...

On 11 April 2013 16:26, Cameron McInally <cameron.mcinally at nyu.edu> wrote: > Hey guys, > > I've come across a bug when combining an AND of FCMPs. This bug occurs in my > compiler as well as Clang built from trunk. > > A reduced test case is: > > int foo( float a, double b ) { > return (a == a) & (b == b); > } > > and the error is: > > Assertion failed: (getOperand(0)->getType() == getOperand(1)->...

Looking at the llvm code I have the impression that ordered fp comparisons should use exception throwing instructions. Is it true? Thanks, Rafael

On Fri, 13 Oct 2006, [UTF-8] Rafael Esp?ndola wrote: > Looking at the llvm code I have the impression that ordered fp > comparisons should use exception throwing instructions. Is it true? Nope, you want non-trapping instructions. If you use trapping instructions, C99 functions like isgreater will not work correctly with NAN's. -Chris -- http://nondot.org/sabre/ http://llvm.org/