search for: f4c491bc

Displaying 3 results from an estimated 3 matches for "f4c491bc".

2013 Mar 06
1
[LLVMdev] Assertion failed after my storeRegToStackSlot/loadFromStackSlot
...cs.uiuc.edu <mailto:LLVMdev at cs.uiuc.edu> > http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev > > -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130306/f4c491bc/attachment.html>
2013 Mar 04
0
[LLVMdev] Assertion failed after my storeRegToStackSlot/loadFromStackSlot
Hi Dmitriy, As you've seen our current spill code assumes that spill/reloads are single instructions. I think the best way to work around this is to introduce load/store pseudo-instructions and expand these after register allocation. Cheers, Lang. On Sat, Feb 23, 2013 at 12:15 AM, Dmitriy Limonov <earl at excluzive.ws> wrote: > Hi All. > > I'm writing
2013 Feb 23
2
[LLVMdev] Assertion failed after my storeRegToStackSlot/loadFromStackSlot
Hi All. I'm writing storeRegToStackSlot and loadFromStackSlot function for my Target. This Target can store/load one byte (not all word) from FrameIndex. If I need to store 16 bit register I will must to split it to two instruction like this: BuildMI(MBB, MI, dl, get(Z80::LD8xmr)) .addFrameIndex(FrameIndex).addImm(0) .addReg(SrcReg, 0, Z80::subreg_lo); BuildMI(MBB, MI, dl,