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p32rc
2012 Feb 10
1
[LLVMdev] Prevent DAG combiner from changing "store ConstFP, addr" to integer store
...b/e) MVT::i32 is a legal type, and I have a "store MVT::i32" instruction,
but I want to later promote the store to a MOV (in a custom lowering step),
and this code above is changing the register class, such that it won't
coalesce. The debug output looks like this (%Xn are phys regs in F32RC
regclass)
--------------
BB#0: derived from LLVM BB %entry
%vreg0<def> = MOV_I32_RI 1; I32RC:%vreg0
%X0<def> = COPY %vreg0; I32RC:%vreg0
%vreg1<def> = MOV_I32_RI 0; I32RC:%vreg1
%X1<def> = COPY %vreg1; I32RC:%vreg1
%X2<def> = COPY %vreg1; I32RC:%vreg1
RET
# End machi...