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Hi Graham, Thank you for offering help. I am trying to create a reproducer. The problem is that the crashes happen whilst LTO is used. One thing I am sure about IR is broken at compile time. Thanks, Evgeny From: Graham Yiu <gyiu at ca.ibm.com> Date: Friday, 10 November 2017 at 16:09 To: Evgeny Astigeevich <Evgeny.Astigeevich at arm.com> Cc: "junbuml at codeaurora.org" <junbuml at codeaurora.org>, "llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.org>, n...

Hi Wei, Thank you for information. Please let me know about any progress in fixing the failures. I can help with checking that the final patch gives the same level of performance improvements. Kind regards, Evgeny Astigeevich Senior Compiler Engineer Compilation Tools ARM > -----Original Message----- > From: Wei Mi [mailto:wmi at google.com] > Sent: Friday, January 27, 2017 6:20 PM > To: Evgeny Astigeevich > Cc: llvm-dev; nd > Subject: Re: Reversion of rL292621 caused about 7% performanc...

Hi Evgeny, Quentin and Matthias found it was a problem about subreg live range update and will push a fix soon (http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20170123/424126.html). Thanks, Wei. On Fri, Jan 27, 2017 at 10:35 AM, Wei Mi <wmi at google.com> wrote: > Sure. Will keep you po...

Hi Evgeny, I just realized that if these are compile-time errors I can help investigate on my end. Do you have something I can use to reproduce? Cheers, Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-707/8200/Markham Email: gyiu at ca.ibm.com From: Graham...

...es I’ve got: https://bugs.llvm.org/show_bug.cgi?id=35288 I have also found that LTO reverts everything the partial inliner has done. Maybe the partial inliner should not be used at the first LTO phase (compilation). I hope I’ll have a chance to look at the code size regressions this week. Thanks, Evgeny Astigeevich From: llvm-dev <llvm-dev-bounces at lists.llvm.org> on behalf of Evgeny Astigeevich via llvm-dev <llvm-dev at lists.llvm.org> Reply-To: Evgeny Astigeevich <Evgeny.Astigeevich at arm.com> Date: Saturday, 11 November 2017 at 17:21 To: Graham Yiu <gyiu at ca.ibm.com&g...

...nk time if GC is a bottleneck. It will also improve eh_frame_hdr build time because you don’t spend time on parsing garbage. However a linker will have to have two versions of GC: one with parsing eh_frames and another without parsing. There can be input object files where .eh_frame is not split. -Evgeny From: Igor Kudrin <ikudrin at accesssoftek.com> Date: Friday, 10 November 2017 at 12:23 To: Evgeny Astigeevich <Evgeny.Astigeevich at arm.com> Cc: nd <nd at arm.com>, "llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.org> Subject: Re: [llvm-dev] [RFC] Making .e...

Confirm there is no change in IR if the hack is disabled in the sources. David wrote that these instructions are created by SCEV. Are other targets affected by the changes, e.g. X86? Kind regards, Evgeny Astigeevich Senior Compiler Engineer Compilation Tools ARM From: Sanjay Patel [mailto:spatel at rotateright.com] Sent: Sunday, January 22, 2017 10:45 PM To: Evgeny Astigeevich Cc: llvm-dev; nd Subject: Re: [InstCombine] rL292492 affected LoopVectorizer and caused 17.30%/11.37% perf regressions on...

...ference whether it knows that in one place or two? What do you mean “one place or two”? If .eh_frame_hdr is not created a linker does not need to parse .eh_frame sections. It simply merges them into one section. The format of .eh_frame allows to do this without parsing .eh_frame sections. Thanks, Evgeny Astigeevich From: Igor Kudrin <ikudrin.dev at gmail.com> Date: Thursday, 9 November 2017 at 11:29 To: Rui Ueyama <ruiu at google.com>, Evgeny Astigeevich <Evgeny.Astigeevich at arm.com> Cc: "llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.org>, nd <nd at ar...

Thank you for information. I’ll build clang without the hack and re-run the benchmark tomorrow. -Evgeny From: Sanjay Patel [mailto:spatel at rotateright.com] Sent: Sunday, January 22, 2017 8:00 PM To: Evgeny Astigeevich Cc: llvm-dev; nd Subject: Re: [InstCombine] rL292492 affected LoopVectorizer and caused 17.30%/11.37% perf regressions on Cortex-A53/Cortex-A15 LNT machines > Do you mean to remo...

...process because we treat min/max like an optimization fence. If this is gonna be a long process to recover, this looks like something to be reverted in the 4.0 branch (unless I missed that there is a correctness fix involved?). — Mehdi > > > > On Mon, Jan 23, 2017 at 11:13 AM, Evgeny Astigeevich <Evgeny.Astigeevich at arm.com <mailto:Evgeny.Astigeevich at arm.com>> wrote: > Confirm there is no change in IR if the hack is disabled in the sources. > > David wrote that these instructions are created by SCEV. > > Are other targets affected by the change...

....llvm.org/D29053> > > If we get lucky, we may be able to sidestep the min/max problem by folding harder before we reach that point in the optimization pipeline. > > > > — > Mehdi > > > >> >> >> >> On Mon, Jan 23, 2017 at 11:13 AM, Evgeny Astigeevich <Evgeny.Astigeevich at arm.com <mailto:Evgeny.Astigeevich at arm.com>> wrote: >> Confirm there is no change in IR if the hack is disabled in the sources. >> >> David wrote that these instructions are created by SCEV. >> >> Are other targets af...

...ance regressions in our benchmark on Cortex-M7/M4. In your commit comment I see it causes build bot failures. What kind are the failures? Compiler crashes or incorrect code generation? Will you fix them? We are interested in the changes because of performance improvements they give. Kind regards, Evgeny Astigeevich Senior Compiler Engineer Compilation Tools ARM -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170127/70ee8352/attachment.html>

Forgot to add that all experiments were done with '-O3 -m64 -fexperimental-new-pass-manager'. Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-707/8200/Markham Email: gyiu at ca.ibm.com From: Graham Yiu/Toronto/IBM To: llvm-dev at lists.llvm.org Cc: junbuml at codeaurora.org, xinliangli at gmail.com Date: 11/02/2017 05:26 PM Subject: [RFC]

...seems to have fizzled out and I would like to try to revive it. My intention is to pick up where Graham left off with enabling partial-inlining by default. On Sat, Dec 9, 2017 at 7:47 AM, Florian Hahn via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi, > > On 13/11/2017 14:47, Evgeny Astigeevich via llvm-dev wrote: > >> Hi Graham, >> >> I created a bug report with a reproducer for the failures I’ve got: >> https://bugs.llvm.org/show_bug.cgi?id=35288 >> >> > That bug should be fixed by https://reviews.llvm.org/rL320199 > > Cheers,...

...solving the issue. What kind of help/support is needed? Should we (ARM Compilation Tools) start digging into the issue and fix it because the issue affects our future ARM Compiler 6 releases? We can provide help with validating that patches fix the issue and don’t introduce new ones. Kind regards, Evgeny Astigeevich Senior Compiler Engineer Compilation Tools ARM From: Sanjay Patel [mailto:spatel at rotateright.com] Sent: Tuesday, January 24, 2017 4:55 PM To: Mehdi Amini Cc: Evgeny Astigeevich; llvm-dev; nd Subject: Re: [llvm-dev] [InstCombine] rL292492 affected LoopVectorizer and caused 17.30%/11...

Hi Sean, Thank you for reminding me. It looks like it get lost among tons of emails and other tasks. I’ll check if the code size issues still exist. Thanks, Evgeny Astigeevich From: Sean Fertile <sd.fertile at gmail.com> Date: Monday, 29 January 2018 at 19:52 To: Florian Hahn <Florian.Hahn at arm.com> Cc: Evgeny Astigeevich <Evgeny.Astigeevich at arm.com>, Graham Yiu <gyiu at ca.ibm.com>, "junbuml at codeaurora.org" <junb...

...o call optimizeCondBranch :). > I believe I missed your point. I missed your point too :) I think it's always good to get rid of CondBranch. We have cases like: SUBS Wd, Wn, 0 B.LO As SUBS sets C to 1 B.LO will fall through. So we can substitute them with an unconditional branch. Thanks, Evgeny From: Quentin Colombet [mailto:qcolombet at apple.com] Sent: 09 March 2016 18:04 To: Evgeny Astigeevich Cc: llvm-dev at lists.llvm.org; nd Subject: Re: [llvm-dev] [CodeGen] PeepholeOptimizer: optimizing condition dependent instrunctions Hi Evgeny, On Mar 9, 2016, at 6:28 AM, Evgeny Astigeevich v...

On 10/25/2017 12:32 PM, Evgeny Astigeevich wrote: > > Hi Hal, > > I quickly checked the execution profile. It is real. The code changed > significantly. A number of the hottest regions changed. I’ll compare IRs. > Thanks. Obviously a 1000% execution performance regression seems problematic. -Hal > JFY...

...ts.llvm.org> on behalf of Sjoerd > Meijer via llvm-dev <llvm-dev at lists.llvm.org> > *Sent:* 23 September 2020 20:03 > *To:* Phipps, Alan <a-phipps at ti.com>; llvm-dev at lists.llvm.org < > llvm-dev at lists.llvm.org>; Eli Friedman <efriedma at quicinc.com>; Evgeny > Astigeevich <Evgeny.Astigeevich at arm.com> > *Subject:* Re: [llvm-dev] Improved jump-threading in LLVM for finite > state automata > > + Evgeny > > We have a jump threading pass downstream for this that we would love to > upstream. I believe Evgeny was working on ex...

...r = my_var.function" in the controller and variable @var is defined in another place and controller just uses it. my_var.stub!(:function).and_return(@var) doesn''t seem to be working. Is there is something like my_var.stub!(:function).add_variable(@var).and_return(:true) ? Thank you, Evgeny =============controller_file before_filter :find_comment, :only => [:destroy] def destroy @destroy_id = @comment.id #to be used in rendering partial @comment.destroy respond_to do |format| format.js end end def find_comment @comment = Comment.find(:first, :c...