Displaying 1 result from an estimated 1 matches for "eng_runlist".
2014 Feb 07
1
[PATCH] nouveau/drm/fifo: fix ENG_RUNLIST register address
Address of the ENG_RUNLIST register should be 0x002284 + (engine * 8),
not 0x002284 + (engine * 4).
Signed-off-by: Alexandre Courbot <acourbot at nvidia.com>
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Stumbled upon this one and I'm quite certain the offset was not correct.
This is inconsequential for GK20A which only features one runlist, but
other GPU...