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2010 Jun 11
0
[LLVMdev] thinking about timing-test-driven scheduler
On Wed, 2010-06-09 at 17:30 +0200, orthochronous wrote:
> Hi,
>
> I've been thinking about how to implement a framework for attempting
> instruction scheduling of small blocks of code by using (GA/simulated
> annealing/etc) controlled timing-test-evaluations of various
> orderings.
This sounds interesting.
> (I'm particularly interested small-ish numerical inner
2010 Jun 09
2
[LLVMdev] thinking about timing-test-driven scheduler
Hi,
I've been thinking about how to implement a framework for attempting
instruction scheduling of small blocks of code by using (GA/simulated
annealing/etc) controlled timing-test-evaluations of various
orderings. (I'm particularly interested small-ish numerical inner loop
code in low-power CPUs like Atom and various ARMs where there CPU
doesn't have the ability to