Displaying 13 results from an estimated 13 matches for "end4".
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2012 Mar 29
1
[LLVMdev] Problem recognizing nested select operations
...%argc, i8** nocapture %argv) nounwind {
entry:
%a = alloca i32, align 4
%call = call i32 (i8*, ...)* @__isoc99_scanf(i8* getelementptr
inbounds ([3 x i8]* @.str, i32 0, i32 0), i32* %a) nounwind
%0 = load i32* %a, align 4, !tbaa !0
%cmp = icmp sgt i32 %0, 255
br i1 %cmp, label %cond.end4, label %cond.false
cond.false: ; preds = %entry
%cmp1 = icmp slt i32 %0, 0
%cond = select i1 %cmp1, i32 0, i32 %0
br label %cond.end4
cond.end4: ; preds = %cond.false,
%entry
%cond5 = phi i32 [ 255, %entry ]...
2010 Sep 07
2
[LLVMdev] loop fusion
...[#uses=1]
%load7 = load float* %gep6 ; <float> [#uses=1]
store float %load7, float* %gep8
%indvar.next = add i64 %indvar, 1 ; <i64> [#uses=2]
%exitcond = icmp eq i64 %indvar.next, 16 ; <i1> [#uses=1]
br i1 %exitcond, label %end4, label %loop3
end4: ; preds = %loop3
ret void
}
2019 Sep 30
3
[cfe-dev] CFG simplification question, and preservation of branching in the original code
...amed_addr #0 {
> entry:
> %cmp = icmp slt i32 %a, 0
> %sub = sub nsw i32 0, %a
> %spec.select = select i1 %cmp, i32 %sub, i32 %a
> %a.lobit = lshr i32 %a, 31
> %0 = trunc i32 %a.lobit to i16
> %cmp1 = icmp slt i32 %b, 0
> br i1 %cmp1, label %if.then2, label %if.end4
>
> if.then2: ; preds = %entry
> %sub3 = sub nsw i32 0, %b
> %1 = xor i16 %0, 1
> br label %if.end4
>
> if.end4: ; preds = %if.then2, %entry
> %b.addr.0 = phi i32 [ %sub3, %if.then2 ], [...
2019 Sep 29
2
[cfe-dev] CFG simplification question, and preservation of branching in the original code
...unnamed_addr #0 {
> entry:
> %cmp = icmp slt i32 %a, 0
> %sub = sub nsw i32 0, %a
> %a.addr.0 = select i1 %cmp, i32 %sub, i32 %a
> %a.lobit = lshr i32 %a, 31
> %0 = trunc i32 %a.lobit to i16
> %cmp1 = icmp slt i32 %b, 0
> br i1 %cmp1, label %if.then2, label %if.end4
>
> if.then2: ; preds = %entry
> %sub3 = sub nsw i32 0, %b
> %1 = xor i16 %0, 1
> br label %if.end4
>
> if.end4: ; preds = %if.then2, %entry
> %b.addr.0 = phi i32 [ %sub3, %if.then2 ], [...
2019 Sep 30
2
[cfe-dev] CFG simplification question, and preservation of branching in the original code
...%b) local_unnamed_addr #0 {
> entry:
> %cmp = icmp slt i32 %a, 0
> %sub = sub nsw i32 0, %a
> %spec.select = select i1 %cmp, i32 %sub, i32 %a
> %a.lobit = lshr i32 %a, 31
> %0 = trunc i32 %a.lobit to i16
> %cmp1 = icmp slt i32 %b, 0
> br i1 %cmp1, label %if.then2, label %if.end4
>
> if.then2: ; preds = %entry
> %sub3 = sub nsw i32 0, %b
> %1 = xor i16 %0, 1
> br label %if.end4
>
> if.end4: ; preds = %if.then2,
> %entry
> %b.addr.0 = phi i32 [ %sub3, %if.then2 ], [ %b...
2010 Sep 07
0
[LLVMdev] loop fusion
...[#uses=1]
%load7 = load float* %gep6 ; <float> [#uses=1]
store float %load7, float* %gep8
%indvar.next = add i64 %indvar, 1 ; <i64> [#uses=2]
%exitcond = icmp eq i64 %indvar.next, 16 ; <i1> [#uses=1]
br i1 %exitcond, label %end4, label %loop3
end4: ; preds = %loop3
ret void
}
2010 Sep 08
0
[LLVMdev] loop fusion
...oad float* %gep6 ;<float> [#uses=1]
> store float %load7, float* %gep8
> %indvar.next = add i64 %indvar, 1 ;<i64> [#uses=2]
> %exitcond = icmp eq i64 %indvar.next, 16 ;<i1> [#uses=1]
> br i1 %exitcond, label %end4, label %loop3
>
> end4: ; preds = %loop3
> ret void
> }
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2019 Oct 01
3
[cfe-dev] CFG simplification question, and preservation of branching in the original code
...mp = icmp slt i32 %a, 0
>>> %sub = sub nsw i32 0, %a
>>> %spec.select = select i1 %cmp, i32 %sub, i32 %a
>>> %a.lobit = lshr i32 %a, 31
>>> %0 = trunc i32 %a.lobit to i16
>>> %cmp1 = icmp slt i32 %b, 0
>>> br i1 %cmp1, label %if.then2, label %if.end4
>>>
>>> if.then2: ; preds = %entry
>>> %sub3 = sub nsw i32 0, %b
>>> %1 = xor i16 %0, 1
>>> br label %if.end4
>>>
>>> if.end4: ; preds = %if.then2, %entr...
2019 Sep 25
2
[cfe-dev] CFG simplification question, and preservation of branching in the original code
Changing the order of the checks in CodeGenPrepare::optimizeSelectInst()
sounds good to me.
But you may need to go further for optimum performance. For example, we may
be canonicalizing math/logic IR patterns into 'select' such as in the
recent:
https://reviews.llvm.org/D67799
So if you want those to become ALU ops again rather than branches, then you
need to do the transform later in
2019 Oct 03
2
[cfe-dev] CFG simplification question, and preservation of branching in the original code
...>>>> %sub = sub nsw i32 0, %a
>>>> %spec.select = select i1 %cmp, i32 %sub, i32 %a
>>>> %a.lobit = lshr i32 %a, 31
>>>> %0 = trunc i32 %a.lobit to i16
>>>> %cmp1 = icmp slt i32 %b, 0
>>>> br i1 %cmp1, label %if.then2, label %if.end4
>>>>
>>>> if.then2: ; preds = %entry
>>>> %sub3 = sub nsw i32 0, %b
>>>> %1 = xor i16 %0, 1
>>>> br label %if.end4
>>>>
>>>> if.end4:...
2010 Oct 04
2
[LLVMdev] missing blocks
...call special_format
oris r0,r0,0
subc r0, %r2, %r12
bne .LBB0_4
oris r0,r0,0
b .LBB0_3
oris r0,r0,0
# BB#3: # %if.then3
call abort
oris r0,r0,0
.LBB0_4: # %if.end4
addi %r2, %r0, 0
call exit
oris r0,r0,0
.Ltmp0:
.size main, .Ltmp0-main
2014 Nov 03
8
[LLVMdev] [PATCH] Protection against stack-based memory corruption errors using SafeStack
...uble %call, double* %x, align 8
+ %cmp = fcmp ogt double %call, 3.140000e+00
+ br i1 %cmp, label %if.then, label %if.else
+
+if.then: ; preds = %entry
+ %call1 = call double @testi_aux() nounwind
+ store double %call1, double* %x, align 8
+ br label %if.end4
+
+if.else: ; preds = %entry
+ %cmp2 = fcmp ogt double %call, 1.000000e+00
+ br i1 %cmp2, label %if.then3, label %if.end4
+
+if.then3: ; preds = %if.else
+ br label %if.end4
+
+if.end4:...
2013 Feb 14
1
[LLVMdev] LiveIntervals analysis problem
...; preds = %for.cond.i
%arrayidx19.i = getelementptr inbounds [13 x i16]* %y.i, i32 0, i32 %k.0.i
%47 = load i16* %arrayidx19.i, align 2, !tbaa !5
%cmp21.i = icmp eq i16 %47, 0
%inc.i = add nsw i32 %k.0.i, 1
br i1 %cmp21.i, label %for.cond.i, label %if.end49.i
if.then30.i: ; preds = %if.end11.i
%tobool31.i = icmp eq i16 %sign.0.i, 0
br i1 %tobool31.i, label %if.else34.i, label %if.then32.i
if.then32.i: ; preds = %if.then30.i
%call33.i = call i32 (i8*, i8*, ...)* @sprintf...