search for: end29

Displaying 3 results from an estimated 3 matches for "end29".

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2016 May 05
2
No remapping of clone instruction in CloneBasicBlock
Hi, Found CloneBasicBlock utility only does the cloning without any remapping. Consider below example: Input block: sw.epilog: ; preds = %sw.bb20, %sw.bb15, %sw.bb10, %sw.bb6, %sw.bb2, %sw.bb, %while.body, %if.end29 %no_final.1 = phi i32 [ %no_final.055, %while.body ], [ 1, %if.end29 ], [ %no_final.055, %sw.bb20 ], [ %no_final.055, %sw.bb15 ], [ %no_final.055, %sw.bb10 ], [ %no_final.055, %sw.bb6 ], [ %no_final.055, %sw.bb2 ], [ %no_final.055, %sw.bb ] %locinput.1 = phi i8* [ %locinput.057, %while.body ],...
2015 May 21
2
[LLVMdev] How can I remove these redundant copy between registers?
Hi, I've been working on a Blackfin backend (llvm-3.6.0) based on the previous one that was removed in llvm-3.1. llc generates codes like this: 29 p1 = r2; 30 r5 = [p1]; 31 p1 = r2; 32 r6 = [p1 + 4]; 33 r5 = r6 + r5; 34 r6 = [p0 + -4]; 35 r5 *= r6; 36 p1 = r2; 37 r6 = [p1 + 8]; 38 p1 = r2; p1 and r2 are in different register classes. A p*
2013 Feb 14
1
[LLVMdev] LiveIntervals analysis problem
...5.i.i.i.i = zext i16 %145 to i32 %146 = load i16* %arrayidx16.i.i.i.i, align 2, !tbaa !5 %conv17.i.i.i.i = zext i16 %146 to i32 %sub.i.i.i.i = sub nsw i32 %conv15.i.i.i.i, %conv17.i.i.i.i %cmp.i3.i.i.i = icmp sgt i32 %sub.i.i.i.i, 0 br i1 %cmp.i3.i.i.i, label %if.then19.i.i.i.i, label %if.end29.i.i.i.i if.then19.i.i.i.i: ; preds = %if.end7.i.i.i.i %147 = load i16* %arraydecay8.i.i.i.i, align 2, !tbaa !5 %148 = load i16* %incdec.ptr.1.i151.i.i.i.i, align 2, !tbaa !5 %149 = load i16* %incdec.ptr.2.i153.i.i.i.i, align 2, !tbaa !5 %150 = load i16* %incd...