search for: eliminateframeindex

I'm investigating a bug associated with debug information that manifests itself in the XCore backend (PR11105). I'd like to understand what the expected behavior of eliminateFrameIndex() is when it is called on a dbg_value machine instruction. Currently the XCore target replaces the frame index with the frame register and sets the next operand to the byte offset from the frame register. A quick glance at some of the other targets suggests this is the right thing to do (for e...

Hello LLVM, The ARM target sometimes adds an instruction with a virtual register in eliminateFrameIndex(): https://github.com/llvm-mirror/llvm/blob/master/lib/Target/ARM/ARMBaseRegisterInfo.cpp This looks late for a virtual register to appear. Where is this vreg made real? Thanks, -steve

Hello all, For my custom processor backend I am trying add some instruction using BuildMI() inside eliminateFrameIndex(). I tried RegScavenger like this: unsigned RegUnused0 = RS->FindUnusedReg(&LASER::GNPRegsRegClass); if (!RegUnused0) RegUnused0 = RS->scavengeRegister(&LASER::GNPRegsRegClass, II, SPAdj); assert(RegUnused0 && "Register scavenger failed"); RS->setRegUsed(RegUn...

On Oct 10, 2011, at 10:26 AM, Richard Osborne wrote: > I'm investigating a bug associated with debug information that manifests > itself in the XCore backend (PR11105). I'd like to understand what the > expected behavior of eliminateFrameIndex() is when it is called on a > dbg_value machine instruction. That is up to the target. The TII::emitFrameIndexDebugValue() hook is called to insert DBG_VALUE instructions referring to values on the stack. The target's eliminateFrameIndex() should be able to handle any DBG_VALUE instructi...

Hi! I started writing a LLVM backend for a custom architecture. I have some register and instruction .td files and some other files/classes like a MCStreamer for assembler output. At the moment I can compile some empty programs so far. I implemented the method ::eliminateFrameIndex() similar to the Sparc and ARM backend. The method looks like this: // frame pointer is in reg of class mytarget::ARegsRegClass unsigned ScratchReg = MF.getRegInfo().createVirtualRegister(&mytarget::ARegsRegClass); const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); BuildMI(*MI.ge...

On 1/29/15 2:00 PM, Steve King wrote: > Hello LLVM, > The ARM target sometimes adds an instruction with a virtual register > in eliminateFrameIndex(): > > https://github.com/llvm-mirror/llvm/blob/master/lib/Target/ARM/ARMBaseRegisterInfo.cpp > > This looks late for a virtual register to appear. Where is this vreg made real? The register scavenger should take care of such emergency post-RA register allocation. For thumb1, this hap...

----- Original Message ----- > From: "Steve King" <steve at metrokings.com> > To: jonathan at codesourcery.com > Cc: llvmdev at cs.uiuc.edu > Sent: Friday, January 30, 2015 10:52:19 AM > Subject: Re: [LLVMdev] creating a vreg in eliminateFrameIndex() > > Thanks Jon and Hal for the helpful pointers. By returning true from > requiresRegisterScavenging() and requiresFrameIndexScavenging(), LLVM > handled all the scavenging effort. That is nearly painless for the > target, so why do some targets seem to do scavenging on their ow...

...venged register. Thanks, -steve On Thu, Jan 29, 2015 at 1:15 PM, Jonathan Roelofs <jroelofs.lists at gmail.com> wrote: > > > On 1/29/15 2:00 PM, Steve King wrote: >> >> Hello LLVM, >> The ARM target sometimes adds an instruction with a virtual register >> in eliminateFrameIndex(): >> >> >> https://github.com/llvm-mirror/llvm/blob/master/lib/Target/ARM/ARMBaseRegisterInfo.cpp >> >> This looks late for a virtual register to appear. Where is this vreg made >> real? > > The register scavenger should take care of such emergency post-R...

Hi! I'm making a strange observation in my backend, that ends in illegal code: Version 1: - I lower FrameIndex to TargetFrameIndex (nothing special) - I generate a special address-register ADD instruction in eliminateFrameIndex() to write FramePointer + offset into a new address-register - I use explicit load and store and address-registers in my target instruction patterns: eg (store (add (load AddressRegs:$a), DataRegs:$b), AddressRegs:$dst) This works quite well, but if I access an array on the stack (LLVM generate...

On Fri, Jan 30, 2015 at 8:59 AM, Hal Finkel <hfinkel at anl.gov> wrote: >> When the scavenged register is loaded with a simple immediate, is it >> safe to search the BB and replace other uses of the same immediate >> with the reg? In my case this gives a code size reduction. The >> search would stop on finding another use of the scavenged register. > > Are you

Hi Richard, Thanks for working on this! Your patched solved my initial problem, but introduced another one. Please find attached another BC file that fails on xcore with the linear scan regalloc. This is the error message I get eliminateFrameIndex Frame size too big: -3 0 llc 0x08affd1e 1 libc.so.6 0xb7d35a01 abort + 257 2 llc 0x081a0972 llvm::XCoreRegisterInfo::eliminateFrameIndex(llvm::ilist_iterator<llvm::MachineInstr>, int, llvm::RegScavenger*) const + 1570 Aborted Could you check what is still wrong? -Roman 20...

I need to use ‘createVirtualRegister’ for a specific case in my ‘eliminateFrameIndex’ function implementation. However, whenever that code is executed, I get the assertion "MachineCopyPropagation should be run after register allocation!” at a later stage. I have seen that at least a couple of backend implementations (including ARM Thumb) create virtual registers in ‘eliminat...

...10/11 19:19, Jakob Stoklund Olesen wrote: > On Oct 10, 2011, at 10:26 AM, Richard Osborne wrote: >> I'm investigating a bug associated with debug information that manifests >> itself in the XCore backend (PR11105). I'd like to understand what the >> expected behavior of eliminateFrameIndex() is when it is called on a >> dbg_value machine instruction. > That is up to the target. > > The TII::emitFrameIndexDebugValue() hook is called to insert DBG_VALUE instructions referring to values on the stack. Thanks for pointing this out. Looking at the code in constructVariableD...

The docs for the above-mentioned function say: This method may modify or replace the specified instruction, as long as it keeps the iterator pointing the the finished product. What does it mean to "keep an interator". Was "invalidates the iterator" intended, so something else. Another question, is how do I really replace the instruction. The operator= is private

Roman Levenstein wrote: > Hi Richard, > > Thanks for working on this! Your patched solved my initial problem, > but introduced another one. Please find attached another BC file that > fails on xcore with the linear scan regalloc. > > This is the error message I get > eliminateFrameIndex Frame size too big: -3 > 0 llc 0x08affd1e > 1 libc.so.6 0xb7d35a01 abort + 257 > 2 llc 0x081a0972 > llvm::XCoreRegisterInfo::eliminateFrameIndex(llvm::ilist_iterator<llvm::MachineInstr>, > int, llvm::RegScavenger*) const + 1570 > Aborted > > Could you...

...ooks. > > To be safe, you should probably only return > true from isLoadFromStackSlot when the > instruction loads the whole stack slot. That > is, the offset is zero, and the stack slot > size matches the register size. This seems to result in dead frame indices being passed to eliminateFrameIndex(). I'm currently handling these by removing the load/store instructions in which they appear. I haven't found any errors in the code that gets generated so far, but I also notice that none of the other back ends seem to have any special logic to handle dead slots in eliminateFrameIndex(). S...

...gister before I. assert(ScavengingFrameIndex >= 0 && "Cannot scavenge register without an emergency spill slot!"); TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, RC,TRI); MachineBasicBlock::iterator II = prior(I); TRI->eliminateFrameIndex(II, SPAdj, this); // Restore the scavenged register before its use (or first terminator). TII->loadRegFromStackSlot(*MBB, UseMI, SReg, ScavengingFrameIndex, RC, TRI); II = prior(UseMI); TRI->eliminateFrameIndex(II, SPAdj, this); }

...our TargetLowering::LowerCall method to emit PUSH instructions (instead of STORE) to pass arguments (which would improve code density for function calls). Is there a way of keeping track of the stack pointer changes implied by the PUSH instruction to calculate the correct offsets in RegisterInfo::eliminateFrameIndex when the call sequence is generated ? Thanks a lot in advance, Rod

...e way to just change the opcode of a machine > instruction. > > I have a lot of long/short pairs where when I know the offset, i can > replace the long version with the short version. Are you looking for something like this: MI.setDesc(TII.get(NewOpcode)); This is in PPCRegisterInfo::eliminateFrameIndex. -Hal > > Tia. > > REed > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >

...assert(ScavengingFrameIndex >= 0 && > "Cannot scavenge register without an emergency spill slot!"); > TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, > RC,TRI); > MachineBasicBlock::iterator II = prior(I); > TRI->eliminateFrameIndex(II, SPAdj, this); > > // Restore the scavenged register before its use (or first terminator). > TII->loadRegFromStackSlot(*MBB, UseMI, SReg, ScavengingFrameIndex, RC, > TRI); > II = prior(UseMI); > TRI->eliminateFrameIndex(II, SPAdj, this); > } > >...