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2007 Jun 06
0
[LLVMdev] Register based vector insert/extract
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2007 Jun 06
2
[LLVMdev] Register based vector insert/extract
On Apr 24, 2007, at 12:01 PM, Chris Lattner wrote:
> Yes, we need those. I think these are the major pieces needed.
> These are
> all relatively small and independent pieces, so we can tackle these
> one at
> a time.
<snip>
> 4. The DAG scheduler pass (which creates machine instrs from dag
> nodes)
> currently thinks of register operands as simple