Displaying 20 results from an estimated 1890 matches for "ebx".
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2020 May 22
2
[PATCH] Optimized assembler version of md5_process() for x86-64
...5
+
+ # rdi = arg #1 (ctx, MD5_CTX pointer)
+ # rsi = arg #2 (ptr, data pointer)
+ # rdx = arg #3 (nbr, number of 16-word blocks to process)
+ mov %rdi, %rbp # rbp = ctx
+ shl $6, %rdx # rdx = nbr in bytes
+ lea (%rsi,%rdx), %rdi # rdi = end
+ mov 0*4(%rbp), %eax # eax = ctx->A
+ mov 1*4(%rbp), %ebx # ebx = ctx->B
+ mov 2*4(%rbp), %ecx # ecx = ctx->C
+ mov 3*4(%rbp), %edx # edx = ctx->D
+ # end is 'rdi'
+ # ptr is 'rsi'
+ # A is 'eax'
+ # B is 'ebx'
+ # C is 'ecx'
+ # D is 'edx'
+
+ cmp %rdi, %rsi # cmp end with ptr
+ je 1f # jmp if ptr...
2003 Aug 22
2
kernel: locore.s doesn't assemble (fillkpt, $PAGE_SHIFT, $PTESHIFT)
...ccOO8Chb.s: Assembler messages:
/tmp/ccOO8Chb.s:2495: Error: suffix or operands invalid for `shr'
shrl $PAGE_SHIFT,%ecx
/tmp/ccOO8Chb.s:2496: Error: suffix or operands invalid for `shr'
/tmp/ccOO8Chb.s:2496: Error: suffix or operands invalid for `shl'
movl %eax, %ebx ; shrl $PAGE_SHIFT, %ebx ;
shll $PTESHIFT,%ebx ; addl (( KPTphys
)-KERNBASE) ,%ebx ; orl $0x001 ,%eax ; orl
%edx ,%eax ; 1: movl %eax,(%ebx)
; addl $PAGE_SIZE,%eax ; addl $PTESIZE,%ebx
; loop 1b...
2012 Mar 28
2
[LLVMdev] Suboptimal code due to excessive spilling
...e s = 0.0;
for (int i = 0; i != k;++i)
{
s += sum(&x[i], 18);
p[i] = 5; // xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
}
return s;
}
====== Output A ======
======================
foo: # @foo
.Ltmp12:
.cfi_startproc
# BB#0:
pushl %ebx
.Ltmp13:
.cfi_def_cfa_offset 8
pushl %edi
.Ltmp14:
.cfi_def_cfa_offset 12
pushl %esi
.Ltmp15:
.cfi_def_cfa_offset 16
subl $88, %esp
.Ltmp16:
.cfi_def_cfa_offset 104
.Ltmp17:
.cfi_offset %esi, -16
.Ltmp18:
.cfi_offset %edi, -12
.Ltmp19:
.cfi_offset %ebx, -8
pxor %xmm0, %xmm0
movl 112(%es...
2004 Sep 10
2
An assembly optimization and fix
....000000000 +0200
@@ -76,107 +76,73 @@
push edi
sub esp, byte 16
; qword [esp] == temp space for loading FLAC__uint64s to FPU regs
- ; dword [esp] == last_error_0
- ; dword [esp + 4] == last_error_1
- ; dword [esp + 8] == last_error_2
- ; dword [esp + 12] == last_error_3
- ; eax == error
; ebx == &data[i]
; ecx == loop counter (i)
- ; edx == temp
- ; edi == save
; ebp == order
; mm0 == total_error_1:total_error_0
- ; mm1 == total_error_3:total_error_2
- ; mm2 == 0:total_error_4
- ; mm3/4 == 0:unpackarea
- ; mm5 == abs(error_1):abs(error_0)
- ; mm5 == abs(error_3):abs(error_2)
+...
2012 Apr 05
0
[LLVMdev] Suboptimal code due to excessive spilling
...e s = 0.0;
for (int i = 0; i != k;++i)
{
s += sum(&x[i], 18);
p[i] = 5; // xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
}
return s;
}
====== Output A ======
======================
foo: # @foo
.Ltmp12:
.cfi_startproc
# BB#0:
pushl %ebx
.Ltmp13:
.cfi_def_cfa_offset 8
pushl %edi
.Ltmp14:
.cfi_def_cfa_offset 12
pushl %esi
.Ltmp15:
.cfi_def_cfa_offset 16
subl $88, %esp
.Ltmp16:
.cfi_def_cfa_offset 104
.Ltmp17:
.cfi_offset %esi, -16
.Ltmp18:
.cfi_offset %edi, -12
.Ltmp19:
.cfi_offset %ebx, -8
pxor %xmm0, %xmm0
movl 112(%es...
2015 Feb 13
2
[LLVMdev] trunk's optimizer generates slower code than 3.5
...tr -48h
var_40 = qword ptr -40h
var_34 = dword ptr -34h
push rbp
push r15
push r14
push r13
push r12
push rbx
sub rsp, 18h
mov ebx, 0FFFFFFFFh
cmp edi, 2
jnz loc_100000F29
mov rdi, [rsi+8] ; char *
xor r14d, r14d
xor esi, esi ; char **
mov edx, 0Ah ; int
call _strtol...
2007 Apr 18
1
[RFC, PATCH 12/24] i386 Vmi processor header
...#define X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */
/*
- * Generic CPUID function
- * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
- * resulting in stale register contents being returned.
- */
-static inline void cpuid(unsigned int op, unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx)
-{
- __asm__("cpuid"
- : "=a" (*eax),
- "=b" (*ebx),
- "=c" (*ecx),
- "=d" (*edx)
- : "0" (op), "c"(0));
-}
-
-/* Some CPUID calls want 'count' to be placed in ecx */
-sta...
2007 Apr 18
1
[RFC, PATCH 12/24] i386 Vmi processor header
...#define X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */
/*
- * Generic CPUID function
- * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
- * resulting in stale register contents being returned.
- */
-static inline void cpuid(unsigned int op, unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx)
-{
- __asm__("cpuid"
- : "=a" (*eax),
- "=b" (*ebx),
- "=c" (*ecx),
- "=d" (*edx)
- : "0" (op), "c"(0));
-}
-
-/* Some CPUID calls want 'count' to be placed in ecx */
-sta...
2015 Feb 14
2
[LLVMdev] trunk's optimizer generates slower code than 3.5
...t;
>> push rbp
>> push r15
>> push r14
>> push r13
>> push r12
>> push rbx
>> sub rsp, 18h
>> mov ebx, 0FFFFFFFFh
>> cmp edi, 2
>> jnz loc_100000F29
>> mov rdi, [rsi+8] ; char *
>> xor r14d, r14d
>> xor esi, esi ; char **
>> mov edx, 0...
2015 Feb 14
2
[LLVMdev] trunk's optimizer generates slower code than 3.5
...push r15
>>>> push r14
>>>> push r13
>>>> push r12
>>>> push rbx
>>>> sub rsp, 18h
>>>> mov ebx, 0FFFFFFFFh
>>>> cmp edi, 2
>>>> jnz loc_100000F29
>>>> mov rdi, [rsi+8] ; char *
>>>> xor r14d, r14d
>>>> xor esi, esi ; char **...
2007 Aug 09
0
[PATCH] x86/hvm: miscellaneous CPUID handling changes
...=================================
--- 2007-08-08.orig/xen/arch/x86/hvm/hvm.c 2007-08-06 15:08:40.000000000 +0200
+++ 2007-08-08/xen/arch/x86/hvm/hvm.c 2007-08-08 11:45:25.000000000 +0200
@@ -614,37 +614,38 @@ void hvm_cpuid(unsigned int input, unsig
{
if ( !cpuid_hypervisor_leaves(input, eax, ebx, ecx, edx) )
{
+ struct vcpu *v = current;
+
cpuid(input, eax, ebx, ecx, edx);
- if ( input == 0x00000001 )
+ switch ( input )
{
- struct vcpu *v = current;
-
- clear_bit(X86_FEATURE_MWAIT & 31, ecx);
+ case 0x00000001:...
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 02/17] paravirt_ops - msr
...=================================================
--- clean-start.orig/include/asm-x86_64/msr.h
+++ clean-start/include/asm-x86_64/msr.h
@@ -2,6 +2,62 @@
#define X86_64_MSR_H 1
#ifndef __ASSEMBLY__
+#include <asm/errno.h>
+
+static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
+ unsigned int *ecx, unsigned int *edx)
+{
+ __asm__("cpuid"
+ : "=a" (*eax),
+ "=b" (*ebx),
+ "=c" (*ecx),
+ "=d" (*edx)
+ : "0" (*eax), "2" (*ecx));
+}
+
+/* wrmsr with exception handling */
+static inline int n...
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 02/17] paravirt_ops - msr
...=================================================
--- clean-start.orig/include/asm-x86_64/msr.h
+++ clean-start/include/asm-x86_64/msr.h
@@ -2,6 +2,62 @@
#define X86_64_MSR_H 1
#ifndef __ASSEMBLY__
+#include <asm/errno.h>
+
+static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
+ unsigned int *ecx, unsigned int *edx)
+{
+ __asm__("cpuid"
+ : "=a" (*eax),
+ "=b" (*ebx),
+ "=c" (*ecx),
+ "=d" (*edx)
+ : "0" (*eax), "2" (*ecx));
+}
+
+/* wrmsr with exception handling */
+static inline int n...
2020 Jan 07
2
Inline assembly in intel syntax mishandling i constraint
...;s asm!(… : "intel") so I'm assuming that's what rust is using, although I didn't verify this).
Here's the example
static int foo;
static int bar;
void _start(void) {
asm volatile("movl %0, %%eax" : : "i"(&foo));
asm volatile("movl %0, %%ebx" : : "i"(&bar));
}
This produces
define void @_start() #0 {
call void asm sideeffect "movl $0, %eax", "i,~{dirflag},~{fpsr},~{flags}"(i32* @foo) #1, !srcloc !3
call void asm sideeffect "movl $0, %ebx", "i,~{dirflag},~{fpsr},~{flags}"(i...
2013 Sep 23
11
[PATCH v4 0/4] x86/HVM: miscellaneous improvements
The first and third patches are cleaned up versions of an earlier v3
submission by Yang.
1: Nested VMX: check VMX capability before read VMX related MSRs
2: VMX: clean up capability checks
3: Nested VMX: fix IA32_VMX_CR4_FIXED1 msr emulation
4: x86: make hvm_cpuid() tolerate NULL pointers
Signed-off-by: Jan Beulich <jbeulich@suse.com>
2004 Nov 12
2
Boot from CD -> system + data on USB storage
Hi,
I am looking for a solution to boot MY system on any PC.
To store most of the system and all of my data I want to use an USB
storage (in my case an external USB harddisk (2.0 capable)).
Since booting off an USB device is not an universal thing I would prefer
to have a boot disk with a minimal system - just enough to load most
(all?) of the system from the attached USB device.
Is this an
2020 Jan 08
2
Inline assembly in intel syntax mishandling i constraint
...uming that's what rust is using, although I didn't verify this).
>
> Here's the example
>
> static int foo;
> static int bar;
>
> void _start(void) {
> asm volatile("movl %0, %%eax" : : "i"(&foo));
> asm volatile("movl %0, %%ebx" : : "i"(&bar));
> }
>
> This produces
> define void @_start() #0 {
> call void asm sideeffect "movl $0, %eax", "i,~{dirflag},~{fpsr},~{flags}"(i32* @foo) #1, !srcloc !3
> call void asm sideeffect "movl $0, %ebx", "i,~{dir...
2007 Apr 18
2
[PATCH] Fix CONFIG_PARAVIRT for 2.6.19-rc5-mm1
...e_cpuid
: "0" (*eax), "2" (*ecx));
}
-/*
- * Generic CPUID function
- * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
- * resulting in stale register contents being returned.
- */
-static inline void cpuid(unsigned int op, unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx)
-{
- *eax = op;
- *ecx = 0;
- __cpuid(eax, ebx, ecx, edx);
-}
-
-/* Some CPUID calls want 'count' to be placed in ecx */
-static inline void cpuid_count(int op, int count, int *eax, int *ebx, int *ecx,
- int *edx)
-{
- *eax = op;
- *ecx = coun...
2007 Apr 18
2
[PATCH] Fix CONFIG_PARAVIRT for 2.6.19-rc5-mm1
...e_cpuid
: "0" (*eax), "2" (*ecx));
}
-/*
- * Generic CPUID function
- * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
- * resulting in stale register contents being returned.
- */
-static inline void cpuid(unsigned int op, unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx)
-{
- *eax = op;
- *ecx = 0;
- __cpuid(eax, ebx, ecx, edx);
-}
-
-/* Some CPUID calls want 'count' to be placed in ecx */
-static inline void cpuid_count(int op, int count, int *eax, int *ebx, int *ecx,
- int *edx)
-{
- *eax = op;
- *ecx = coun...
2015 Feb 20
3
[LLVMdev] clang .code16 with -Os producing larger code that it needs to
...ting with compiling GRUB2 with clang using integrated as,
I found out that it generates a 16-bit code bigger than gas counterpart
and result gets too big for size constraints of bootsector. This was
traced mainly to 2 problems.
32-bit access to 16-bit addresses.
source:
movl LOCAL(kernel_sector), %ebx
movl %ebx, 8(%si)
clang:
7cbc: 67 66 8b 1d 5c 7c 00 addr32 mov 0x7c5c,%ebx
7cc3: 00
7cc4: 66 89 5c 08 mov %ebx,0x8(%si)
gas:
7cbc: 66 8b 1e 5c 7c mov 0x7c5c,%ebx
7cc1: 66 89 5c 08 mov %ebx,0x8(%si)
32-bit jump.
source:
jnb LOCAL(floppy_pro...