search for: eax

...l (r13 is unused) + push %r14 + push %r15 + + # rdi = arg #1 (ctx, MD5_CTX pointer) + # rsi = arg #2 (ptr, data pointer) + # rdx = arg #3 (nbr, number of 16-word blocks to process) + mov %rdi, %rbp # rbp = ctx + shl $6, %rdx # rdx = nbr in bytes + lea (%rsi,%rdx), %rdi # rdi = end + mov 0*4(%rbp), %eax # eax = ctx->A + mov 1*4(%rbp), %ebx # ebx = ctx->B + mov 2*4(%rbp), %ecx # ecx = ctx->C + mov 3*4(%rbp), %edx # edx = ctx->D + # end is 'rdi' + # ptr is 'rsi' + # A is 'eax' + # B is 'ebx' + # C is 'ecx' + # D is 'edx' + + cmp %rdi, %rsi...

...== ...I get the following result: ===> .file "test.cpp" .text .globl _Z13test_registeri .align 16, 0x90 .type _Z13test_registeri, at function _Z13test_registeri: # @_Z13test_registeri .cfi_startproc # BB#0: # %entry movl %edi, %eax sarl $2, %eax xorl %edi, %eax movl %eax, %ecx sarl $3, %ecx xorl %eax, %ecx movl %ecx, %edx sarl $4, %edx xorl %ecx, %edx movl %edx, %eax sarl $5, %eax xorl %edx, %eax retq .Ltmp0: .size _Z13test_registeri, .Ltmp0-_Z13test_registeri .cfi_endproc .globl _Z14test_scheduleri .align 16...

...86 from else // these 4 lines is crc >>= 1; // rather poor! } return ~crc; } See <https://godbolt.org/z/eYJeWt> (-O1) and <https://godbolt.org/z/zeExHm> (-O2) crc32be: # @crc32be xor eax, eax test esi, esi jne .LBB0_2 jmp .LBB0_5 .LBB0_4: # in Loop: Header=BB0_2 Depth=1 add rdi, 1 test esi, esi je .LBB0_5 .LBB0_2: # =>This Loop Header: Depth=1 add esi, -1 movzx edx, byte ptr [rdi] shl...

...n (x > 0) - (x < 0); } long long llsign(long long x) { return (x > 0) - (x < 0); } While the code generated for the "long" version of this function is quite OK, the code for the "long long" version misses an obvious optimisation: lsign: # @lsign mov eax, dword ptr [esp + 4] | mov eax, dword ptr [esp + 4] xor ecx, ecx | test eax, eax | cdq setg cl | neg eax sar eax, 31 | adc edx, edx add eax, ecx...

...else crc <<= 1; return crc; } unsigned int bar(unsigned int crc, unsigned int poly) { if (crc & 1) crc >>= 1, crc ^= poly; else crc >>= 1; return crc; } and you get the perfect code for the left-shifting case! foo: # @foo lea eax, [rdi + rdi] sar edi, 31 and edi, esi xor eax, edi ret The right-shifting case leaves but still room for improvement! bar: # @bar | bar: # @bar mov eax, edi | and eax, 1 | neg eax | shr edi | sh...

...let me know. diff --git a/core/comboot.inc b/core/comboot.inc index 2ff5f33..0d4f931 100644 --- a/core/comboot.inc +++ b/core/comboot.inc @@ -1067,12 +1067,8 @@ comapi_opendir: mov di,InitRD call mangle_name pop ds - call searchdir - jnz comapi_err ; Didn't find a directory - cmp eax,0 - jz comapi_err ; Found nothing - ;ZF is unset - call alloc_fill_dir + call searchdir4dir + jz comapi_err mov P_EAX,eax mov P_CX,SECTOR_SIZE mov P_SI,si diff --git a/core/ldlinux.asm b/core/ldlinux.asm index 2219d5f..0bd7d0d 100644 --- a/core/ldlinux.asm +++ b/core/ldlinux.asm @@ -...

...02-09-17 16:19:08.000000000 +0200 @@ -76,107 +76,73 @@ push edi sub esp, byte 16 ; qword [esp] == temp space for loading FLAC__uint64s to FPU regs - ; dword [esp] == last_error_0 - ; dword [esp + 4] == last_error_1 - ; dword [esp + 8] == last_error_2 - ; dword [esp + 12] == last_error_3 - ; eax == error ; ebx == &data[i] ; ecx == loop counter (i) - ; edx == temp - ; edi == save ; ebp == order ; mm0 == total_error_1:total_error_0 - ; mm1 == total_error_3:total_error_2 - ; mm2 == 0:total_error_4 - ; mm3/4 == 0:unpackarea - ; mm5 == abs(error_1):abs(error_0) - ; mm5 == abs(error_...

...ort in this language (which is D, LLVMDC[1]) is through asm *statements*. I never have inline asm *expressions*, and outputs are always via memory. I D my test looks like this: extern(C) int printf(char*,...); int main() { int i = 12; printf("%d\n", i); asm { mov EAX, i; add EAX, EAX; mul EAX, 2; mov i, EAX; // *** } printf("%d\n", i); return 0; } if the *** line is commented I get this LL (unrelevant stuff removed): ; ModuleID = 'tangotests.asm1' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16...

...LLSTACKDOWN 8 %reg1028 = ADD32rr %reg1026, %reg1027 %reg1029 = IMUL32rr %reg1028, %reg1027 MOV32mr %ESP, 1, %NOREG, 4, %reg1029 MOV32mi %ESP, 1, %NOREG, 0, <ga:.str_1> CALLpcrel32 <ga:printf> ADJCALLSTACKUP 8, 0 %reg1030 = MOV32rr %EAX %reg1031 = IMPLICIT_DEF_GR32 %EAX = MOV32rr %reg1031 RET My allocator produces this mapping: FNSTCW16m := MOV8mi := FLDCW16m := MOV32rm EAX := MOV32rm EAX := EAX MOVSX32rm8 ECX := EAX MOVSX32rm8...

...edi + push ebx ; for(coeff = 0; coeff < lag; coeff++) ; autoc[coeff] = 0.0; - mov edi, [esp + 24] ; edi == autoc - mov ecx, [esp + 20] ; ecx = # of dwords (=lag) of 0 to write + mov edi, [esp + 28] ; edi == autoc + mov ecx, [esp + 24] ; ecx = # of dwords (=lag) of 0 to write xor eax, eax rep stosd ; const unsigned limit = data_len - lag; - mov eax, [esp + 20] ; eax == lag - mov ecx, [esp + 16] + mov eax, [esp + 24] ; eax == lag + mov ecx, [esp + 20] sub ecx, eax ; ecx == limit - mov edi, [esp + 24] ; edi == autoc - mov esi, [esp + 12] ; esi == data + mov ed...

...m > *statements*. > I never have inline asm *expressions*, and outputs are always via memory. > > I D my test looks like this: > > extern(C) int printf(char*,...); > int main() > { > int i = 12; > printf("%d\n", i); > asm > { > mov EAX, i; > add EAX, EAX; > mul EAX, 2; > mov i, EAX; // *** > } > printf("%d\n", i); > return 0; > } Equivalent C code using gcc inline asm: int main() { int i = 12; printf("%d\n", i); asm("movl %1, %%eax;add %%eax,%%eax;imull...

Hi, I am looking for a solution to boot MY system on any PC. To store most of the system and all of my data I want to use an USB storage (in my case an external USB harddisk (2.0 capable)). Since booting off an USB device is not an universal thing I would prefer to have a boot disk with a minimal system - just enough to load most (all?) of the system from the attached USB device. Is this an

...on of memory. I used IDA to disassemble the app. Here's the section where it reads from memory and crashes because of a protection violation: 00760D4A sub_760D4A proc near ; CODE XREF: sub_75FCB0+159^Xp 00760D4A push ebp 00760D4B mov eax, ds:dword_75D66C 00760D50 mov ebp, esp 00760D52 sub esp, 14h 00760D55 push ebx ; ; localvar <- *(long *)75D66C = 0x56000 ; 00760D56 mov [ebp-4], eax 00760D59 push esi 00760D5A push...

...0, int 3) ret void } Generated with ISelPattern: 17160410 sub esp,1Ch 17160413 mov dword ptr ds:[161D6240h],0 1716041D mov dword ptr ds:[161D6244h],0 17160427 mov dword ptr ds:[161D6248h],0 17160431 mov dword ptr ds:[161D624Ch],0 1716043B mov eax,76E4560h 17160440 mov dword ptr [esp],eax 17160443 call HueVMReadCommands_LLVMReadVoxel (19BB229h) 17160448 fsub dword ptr ds:[161D6280h] 1716044E fabs 17160450 fst qword ptr [esp+14h] 17160454 ftst 17160456 fstp st(0) 17160458 fnstsw ax 1716045A s...

...main(){ int a, b; scanf("%d %d", &a, &b); return cal(a,b); } *X86 .s file with clang at O2 for above program :* suyog at suyog-Inspiron-N5010:~$ Open/rbuild/bin/clang -S -O2 1.c main: # @main # BB#0: subl $28, %esp leal 20(%esp), %eax movl %eax, 8(%esp) leal 24(%esp), %eax movl %eax, 4(%esp) movl $.L.str, (%esp) calll __isoc99_scanf movl 20(%esp), %eax * orl 24(%esp), %eax* addl $28, %esp retl As seen, optimization happened at IR level itself reflected in .s file. *GCC...

The following makes 'x86info -r' dump hypervisor leaf cpu ids (for kvm this is signature+features) when running in a vm. On the guest we see the signature and the features: eax in: 0x40000000, eax = 00000000 ebx = 4b4d564b ecx = 564b4d56 edx = 0000004d eax in: 0x40000001, eax = 0100007b ebx = 00000000 ecx = 00000000 edx = 00000000 Hypervisor flag is checked to avoid output changes when not running on a VM. Signed-off-by: Michael S. Tsirkin <mst at redhat.com> Cha...

The following makes 'x86info -r' dump hypervisor leaf cpu ids (for kvm this is signature+features) when running in a vm. On the guest we see the signature and the features: eax in: 0x40000000, eax = 00000000 ebx = 4b4d564b ecx = 564b4d56 edx = 0000004d eax in: 0x40000001, eax = 0100007b ebx = 00000000 ecx = 00000000 edx = 00000000 Hypervisor flag is checked to avoid output changes when not running on a VM. Signed-off-by: Michael S. Tsirkin <mst at redhat.com> Cha...

Problem seems not only with operator overloading, It occurs with struct value returning also. gdb while debugging expects the return value in eax, gcc does returns in eax, But Clang returns in edx(it can be checked in gdb by printing the contents of edx). Code(sample code) struct A1 { int x; int y; }; A1 sum(const A1 one, const A1 two) { A1 plus = {0,0}; plus.x = one.x + two.x; plus.y = one.y + two.y; return (plus); } int main...

...ins . With unsigned types this is easy: int uaddo_native(unsigned a, unsigned b, unsigned* s) { return __builtin_add_overflow(a, b, s); } int uaddo_portable(unsigned a, unsigned b, unsigned* s) { *s = a + b; return *s < a; } We get exactly the same assembly: uaddo_native: # @uaddo_native xor eax, eax add edi, esi setb al mov dword ptr [rdx], edi ret uaddo_portable: # @uaddo_portable xor eax, eax add edi, esi setb al mov dword ptr [rdx], edi ret But with signed types it is not so easy. I tried 2 versions, but the result is quite far away from the optimal assembly. int saddo_native(int a,...

Evan, thanks for responding so quickly. On Tuesday 26 June 2007 14:11, Evan Cheng wrote: > On Jun 26, 2007, at 11:20 AM, David A. Greene wrote: > > 28 %AL<dead> = MOV8rr %reg1024<kill>, %EAX<imp-def> > > MOV8rr %mreg(2)<d> %reg1024 %mreg(17)<d> > > 32 CALL64pcrel32 <ga:printf>, %RDI<kill>, %RAX<imp-def>, %RCX<imp- > > def,dead>, > > %RDX<imp-def,dead>, %RSI<imp-def,dead>, %RDI<imp-def,dead>, > > %...