search for: duallink_scale

...eau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c index 856b3ef5edb8..938832a6af15 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.c +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c @@ -1034,7 +1034,7 @@ get_tmds_link_bandwidth(struct drm_connector *connector) unsigned duallink_scale = nouveau_duallink && nv_encoder->dcb->duallink_possible ? 2 : 1; - if (drm_detect_hdmi_monitor(nv_connector->edid)) { + if (nv_connector->base.display_info.is_hdmi) { info = &nv_connector->base.display_info; duallink_scale = 1; } -- 2.39.2

...rs/gpu/drm/nouveau/nouveau_connector.c > index 856b3ef5edb8..938832a6af15 100644 > --- a/drivers/gpu/drm/nouveau/nouveau_connector.c > +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c > @@ -1034,7 +1034,7 @@ get_tmds_link_bandwidth(struct drm_connector *connector) > unsigned duallink_scale = > nouveau_duallink && nv_encoder->dcb->duallink_possible ? 2 : 1; > > - if (drm_detect_hdmi_monitor(nv_connector->edid)) { > + if (nv_connector->base.display_info.is_hdmi) { > info = &nv_connector->base.display_...

This is the beginnings of HDMI 2.0 support. All of the "extra" features are left out, such as 12/16bpc, YUV420, etc. I've verified that with this code, a GP108 (GT1030) can switch between 4k at 60 and 1920x1080 at 60 on a LG 4K TV. Further, I've verified via i2c tools, that the SCDC writes really do happen. I suspect that the patch for keeping track of the high-speed TMDS

THIS IS UNTESTED for anything other than i915. Use previously parsed EDID where possible for display audio/hdmi detection. This in turn reduces edid_blob_ptr usage in a number of places. Further reduce edid_blob_ptr usage, and document that it should not be used by drivers directly. BR, Jani. Cc: Alain Volmat <alain.volmat at foss.st.com> Cc: Alex Deucher <alexander.deucher at

...reg.h" #include "nouveau_drv.h" #include "dispnv04/hw.h" +#include "dispnv50/disp.h" #include "nouveau_acpi.h" #include "nouveau_display.h" @@ -1033,6 +1034,24 @@ get_tmds_link_bandwidth(struct drm_connector *connector) return 112000 * duallink_scale; } +enum drm_mode_status +nouveau_conn_mode_clock_valid(const struct drm_display_mode *mode, + const unsigned min_clock, + const unsigned max_clock, + unsigned *clock) +{ + if ((mode->flags & DRM_MODE_FLAG_3D_MASK) == + DRM_MODE_FLAG_3D_FRAME_PACKING) + *clock...

...au_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c index 49dd0cbc332f..6f21f36719fc 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.c +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c @@ -1023,29 +1023,6 @@ get_tmds_link_bandwidth(struct drm_connector *connector) return 112000 * duallink_scale; } -enum drm_mode_status -nouveau_conn_mode_clock_valid(const struct drm_display_mode *mode, - const unsigned min_clock, - const unsigned max_clock, - unsigned int *clock_out) -{ - unsigned int clock = mode->clock; - - if ((mode->flags & DRM_MODE_FLAG_3D_MASK) =...

Just a backport of the two patches for v5.9 that you'll want to apply. The first one was Cc'd to stable, but I forgot to Cc the second one as well. Lyude Paul (2): drm/nouveau/kms/nv50-: Get rid of bogus nouveau_conn_mode_valid() drm/nouveau/kms/nv50-: Fix clock checking algorithm in nv50_dp_mode_valid() drivers/gpu/drm/nouveau/nouveau_connector.c | 36 ++++++---------------

I've sent this some moths ago, let's try again... BR, Jani. Jani Nikula (6): drm/nouveau: convert to using is_hdmi and has_audio from display info drm/radeon: convert to using is_hdmi and has_audio from display info drm/radeon: remove radeon_connector_edid() and stop using edid_blob_ptr drm/amdgpu: remove amdgpu_connector_edid() and stop using edid_blob_ptr drm/edid:

Currently, nouveau doesn't actually bother to try probing whether or not it can actually handle interlaced modes over DisplayPort. As a result, on volta and later we'll end up trying to set an interlaced mode even when it's not supported and cause the front end for the display engine to hang. So, let's teach nouveau to reject interlaced modes on hardware that can't actually

Currently, nouveau doesn't actually bother to try probing whether or not it can actually handle interlaced modes over DisplayPort. As a result, on volta and later we'll end up trying to set an interlaced mode even when it's not supported and cause the front end for the display engine to hang. So, let's teach nouveau to reject interlaced modes on hardware that can't actually

Currently, nouveau doesn't actually bother to try probing whether or not it can actually handle interlaced modes over DisplayPort. As a result, on volta and later we'll end up trying to set an interlaced mode even when it's not supported and cause the front end for the display engine to hang. So, let's teach nouveau to reject interlaced modes on hardware that can't actually