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2012 Jan 26
2
[LLVMdev] HELP - tblgen -gen-asm-matcher restrictions on .td content
...fo.td would get flagged.
!strconcat(instr_asm, "\t$$zero, $rs, $rt"),
% tblgen -gen-asm-matcher -I ~/workarea/asm/llvm/include/ Mips.td
Included from Mips.td:24:
Included from MipsInstrInfo.td:1120:
Mips64InstrInfo.td:173:1: error: error: unable to find operand: 'zero'
def DSDIV : Div64<MipsDivRem, 0x1e, "ddiv", IIIdiv>;
^
Any information on this would be great.
Cheers,
Jack
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2012 Feb 03
0
[LLVMdev] HELP - tblgen -gen-asm-matcher restrictions on .td content
...!strconcat(instr_asm, "\t$$zero, $rs, $rt"),
>
> % tblgen -gen-asm-matcher -I ~/workarea/asm/llvm/include/ Mips.td
> Included from Mips.td:24:
> Included from MipsInstrInfo.td:1120:
> Mips64InstrInfo.td:173:1: error: error: unable to find operand: 'zero'
> def DSDIV : Div64<MipsDivRem, 0x1e, "ddiv", IIIdiv>;
> ^
>
That's a bug/limitation of the asm matcher. For something similar, see X86InstrInfo.td's commented out definition of ShiftRotateByOneAlias.
-Jim
> Any information on this would be great.
>
> Cheers,
>...
2012 Jan 19
0
[LLVMdev] Problem generating <target>GenAsmMatcher.inc
....
In building MipsGenAsmMatcher.inc I am hitting the following issue (actually several, but they may be related). It may have something to do with the $$ escape sequence:
/home/jcarter/workarea/llvm/lib/Target/Mips/Mips64InstrInfo.td:173:1: error: error: unable to find operand: 'zero'
def DSDIV : Div64<MipsDivRem, 0x1e, "ddiv", IIIdiv>;
Here is the sequence of definitions:
def SDT_MipsDivRem : SDTypeProfile<0, 2,
[SDTCisInt<0>,
SDTCisSameAs<0, 1>]>;
def MipsDivR...