Displaying 2 results from an estimated 2 matches for "drmc_sdclnm2m5kvhk".
2018 Apr 12
0
How to specify the RegisterClass of an IMPLICIT_DEF?
On 4/12/2018 8:01 AM, Dominique Torette via llvm-dev wrote:
>
> But there is one small issue in the inference of RegisterClass of the
> implicitly defined register.
>
> As shown below, the %vreg6<def> is implicitly defined as FPUabRegisterClass.
>
> This register class accepts the v2f32 type, but for others addressing
> mode context this register should be
2018 Apr 12
2
How to specify the RegisterClass of an IMPLICIT_DEF?
Hi,
I'm implementing the built_vector as an IMPLICIT_DEF followed by INSERT_SUBREGs. This approach is the one of the SPARC architecture.
def : Pat<(build_vector (f32 fpimm:$a1), (f32 fpimm:$a2)),
(INSERT_SUBREG(INSERT_SUBREG (v2f32 (IMPLICIT_DEF)),
(i32 (COPY_TO_REGCLASS (MOVSUTO_A_iSLo (bitcast_fpimm_to_i32 f32:$a1)), FPUaOffsetClass)), A_UNIT_PART),