search for: drm_nouveau_private

Hi, this is continuation for the MMIO accessor rewrite and cleanup. I am currently running nv28 with these patches applied, but I cannot test on PPC. Please, review and comment. If the direction is good, I'll do the same to INSTANCE_{RD,WR} as I did for nv_{rd,wr}32, and change PRAMIN from drm_local_map to simple ioremap. Can the same be done for channel specific mappings, that is

...+ */ + +#include <linux/backlight.h> + +#include "drmP.h" +#include "nouveau_drv.h" +#include "nouveau_drm.h" +#include "nouveau_reg.h" + +static int nv40_get_intensity(struct backlight_device *bd) +{ + struct drm_device *dev = bl_get_data(bd); + struct drm_nouveau_private *dev_priv = dev->dev_private; + int val = (NV_READ(NV40_PMC_BACKLIGHT) & NV40_PMC_BACKLIGHT_MASK) >> 16; + + return val; +} + +static int nv40_set_intensity(struct backlight_device *bd) +{ + struct drm_device *dev = bl_get_data(bd); + struct drm_nouveau_private *dev_priv = dev->dev_...

...--- a/drivers/gpu/drm/nouveau/nv10_fb.c +++ b/drivers/gpu/drm/nouveau/nv10_fb.c @@ -3,17 +3,37 @@ #include "nouveau_drv.h" #include "nouveau_drm.h" +void +nv10_fb_set_region_tiling(struct drm_device *dev, int i, uint32_t addr, + uint32_t size, uint32_t pitch) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + uint32_t limit = max(1u, addr + size) - 1; + + if (pitch) { + if (dev_priv->card_type >= NV_20) + addr |= 1; + else + addr |= 1 << 31; + } + + nv_wr32(dev, NV10_PFB_TLIMIT(i), limit); + nv_wr32(dev, NV10_PFB_TSIZE(i), pitch); + nv_wr32(dev, NV10_...

...U)); + parse_bit_table(dev, bios, bitoffset, &BIT_TABLE('P', performance)); return 0; } @@ -5252,6 +5302,7 @@ static int parse_dcb_table(struct drm_device *dev, struct nvbios *bios, bool two { struct bios_parsed_dcb *bdcb = &bios->bdcb; struct parsed_dcb *dcb; + struct drm_nouveau_private *dev_priv = dev->dev_private; uint16_t dcbptr, i2ctabptr = 0; uint8_t *dcbtable; uint8_t headerlen = 0x4, entries = DCB_MAX_NUM_ENTRIES; @@ -5357,8 +5408,19 @@ static int parse_dcb_table(struct drm_device *dev, struct nvbios *bios, bool two NV_WARN(dev, "No pointer to DCB I2C port...

...uveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h @@ -358,7 +358,6 @@ struct nouveau_engine { struct nouveau_fb_engine fb; struct nouveau_pgraph_engine graph; struct nouveau_fifo_engine fifo; - spinlock_t lock; }; struct nouveau_pll_vals { @@ -534,6 +533,9 @@ struct drm_nouveau_private { struct nouveau_engine engine; struct nouveau_channel *channel; + /* For PFIFO and PGRAPH. */ + spinlock_t context_switch_lock; + /* RAMIN configuration, RAMFC, RAMHT and RAMRO offsets */ struct nouveau_gpuobj *ramht; uint32_t ramin_rsvd_vram; diff --git a/drivers/gpu/drm/nouveau/nouve...

...err = -EINVAL; + break; + }; + if (err) + goto error; + + return block; +error: + nouveau_mem_free_block(block); + return NULL; +} + +static struct mem_block * +nouveau_mem_alloc_pci(struct drm_device *dev, uint64_t size, int alignment, + int flags, struct drm_file *file_priv) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + + return __nouveau_mem_alloc(dev, NOUVEAU_MEM_PCI, dev_priv->pci_heap, + size, alignment, flags, file_priv); +} + +static struct mem_block * +nouveau_mem_alloc_agp(struct drm_device *dev, uint64_t size, int alignment, + int flags, struct drm_file *...

...intr_rwsem *r) +{ + up_write(&r->rwsem); + mutex_unlock(&r->mutex); +} + +static long nouveau_ioctl(struct file *filp, + unsigned int cmd, unsigned long arg) +{ + struct drm_file *file_priv = filp->private_data; + struct drm_device *dev = file_priv->minor->dev; + struct drm_nouveau_private *dev_priv = dev->dev_private; + + long ret = intr_rwsem_down_read_interruptible(&dev_priv->ioctls_rwsem); + if (ret) + return ret; + + ret = drm_ioctl(filp, cmd, arg); + + intr_rwsem_up_read(&dev_priv->ioctls_rwsem); + + return ret; +} + static const struct file_operations nouvea...

...u_gem_object_new, .gem_free_object = nouveau_gem_object_del, diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index d120baf..01500e1 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h @@ -708,6 +708,10 @@ struct drm_nouveau_private { struct drm_device *dev; bool noaccel; + struct mutex reset_lock; + atomic_t gpureset_in_progress; + unsigned long last_gpu_reset; + /* the card type, takes NV_* as values */ enum nouveau_card_type card_type; /* exact chipset, derived from NV_PMC_BOOT_0 */ @@ -841,6 +845,7 @@ struct dr...

Remove drm_nouveau_private::fb member and map the piece of VRAM only when accessing VGA fonts. Collect copied code into the static function nouveau_vga_font_io(). Signed-off-by: Pekka Paalanen <pq at iki.fi> --- drivers/gpu/drm/nouveau/nouveau_drv.h | 17 ------- drivers/gpu/drm/nouveau/nouveau_hw.c | 75 ++...

nouveau_bo_wait will make the GPU channel wait for fence if possible, otherwise falling back to waiting with the CPU using ttm_bo_wait. The nouveau_fence_sync function currently returns -ENOSYS, and is the focus of the next patch. Signed-off-by: Luca Barbieri <luca at luca-barbieri.com> --- drivers/gpu/drm/nouveau/nouveau_bo.c | 68 ++++++++++++++++++++++++++++++-

...| 1 + 5 files changed, 72 insertions(+), 36 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index ace630a..59641eb 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h @@ -621,6 +621,8 @@ struct drm_nouveau_private { struct { struct dentry *channel_root; } debugfs; + + struct apertures_struct *apertures; }; static inline struct drm_nouveau_private * diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c index 6b2d5ab..660746b 100644 --- a/drivers/gpu/drm/nouv...

Changes in v2: - Addressed review comments nouveau_bo_wait will make the GPU channel wait for fence if possible, otherwise falling back to waiting with the CPU using ttm_bo_wait. The nouveau_fence_sync function currently returns -ENOSYS, and is the focus of the next patch. Signed-off-by: Luca Barbieri <luca at luca-barbieri.com> --- drivers/gpu/drm/nouveau/nouveau_bo.c | 68

...try, struct nouveau_fence, entry); @@ -84,6 +85,7 @@ nouveau_fence_update(struct nouveau_channel *chan) if (sequence == chan->fence.sequence_ack) break; } + spin_unlock(&chan->fence.lock); } int @@ -119,7 +121,6 @@ nouveau_fence_emit(struct nouveau_fence *fence) { struct drm_nouveau_private *dev_priv = fence->channel->dev->dev_private; struct nouveau_channel *chan = fence->channel; - unsigned long flags; int ret; ret = RING_SPACE(chan, 2); @@ -127,9 +128,7 @@ nouveau_fence_emit(struct nouveau_fence *fence) return ret; if (unlikely(chan->fence.sequence ==...

...truct nouveau_mem **pmem) } int -nv50_vram_new(struct drm_device *dev, u64 size, u32 align, u32 size_nc, - u32 memtype, struct nouveau_mem **pmem) +nv50_vram_new(struct drm_device *dev, u32 base, u64 size, u32 align, + u32 size_nc, u32 memtype, struct nouveau_mem **pmem) { struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_mm *mm = &dev_priv->engine.vram.mm; @@ -91,6 +92,8 @@ nv50_vram_new(struct drm_device *dev, u64 size, u32 align, u32 size_nc, if (!types[type]) return -EINVAL; + + base >>= 12; size >>= 12; align >>= 12; size_nc...

...M_PL_PRIV1); ttm_bo_clean_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM); ttm_bo_device_release(&dev_priv->ttm.bdev); @@ -410,6 +412,17 @@ uint64_t nouveau_mem_fb_amount(struct drm_device *dev) return 0; } +static uint64_t nouveau_mem_scanout_limit(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv=dev->dev_private; + uint64_t vram_size = dev_priv->fb_available_size; + + if (dev_priv->card_type == NV_04) + return min(16ull*1024*1024, vram_size); + + return vram_size; +} + static void nouveau_mem_reset_agp(struct drm_device *dev) { uint32_t saved_pci_nv_1, saved_pci_nv_...

...fbcon.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) --- a/drivers/gpu/drm/nouveau/nv50_fbcon.c +++ b/drivers/gpu/drm/nouveau/nv50_fbcon.c @@ -10,6 +10,7 @@ nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect) struct drm_device *dev = par->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_channel *chan = dev_priv->channel; + uint32_t color; if (info->state != FBINFO_STATE_RUNNING) return; @@ -31,7 +32,12 @@ nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect) OUT_RING(chan, 1); } BEGIN_RING(ch...

...ize, type, 0, + &block->map); +} + +static int nouveau_addmap_pci(struct drm_device *dev, struct mem_block *block) +{ + return nouveau_addmap(dev, block, block->start, _DRM_SCATTER_GATHER); +} + +static int nouveau_addmap_fb(struct drm_device *dev, struct mem_block *block) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + unsigned long offset = block->start + dev_priv->fb_phys; + + return nouveau_addmap(dev, block, offset, _DRM_SCATTER_GATHER); +} + +static int nouveau_addmap_agp(struct drm_device *dev, struct mem_block *block) +{ + struct drm_nouveau_private *dev_priv = dev-...

...nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_DATA, cp[i]); + } else { + dev_priv->engine.graph.accel_blocked = true; + } + kfree(cp); + } nv_wr32(dev, 0x400320, 4); nv_wr32(dev, NV40_PGRAPH_CTXCTL_CUR, 0); @@ -193,13 +195,13 @@ nv50_graph_create_context(struct nouveau_channel *chan) struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_gpuobj *ramin = chan->ramin->gpuobj; struct nouveau_gpuobj *ctx; - uint32_t grctx_size = 0x70000; + struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph; int hdr, ret; NV_DEBUG(dev, "ch%d\n", chan->id);...

...value); +} +#define nouveau_print_enum_names(val, namelist) \ + nouveau_print_enum_names_((val), (namelist), ARRAY_SIZE(namelist)) static int nouveau_graph_chid_from_grctx(struct drm_device *dev) @@ -427,14 +452,16 @@ nouveau_graph_dump_trap_info(struct drm_device *dev, const char *id, struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t nsource = trap->nsource, nstatus = trap->nstatus; - NV_INFO(dev, "%s - nSource:", id); - nouveau_print_bitfield_names(nsource, nsource_names); - printk(", nStatus:"); - if (dev_priv->card_type < NV_10) - nouveau_print_bi...

...drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c index 69688ef..fa0cf14 100644 --- a/drivers/gpu/drm/nouveau/nouveau_display.c +++ b/drivers/gpu/drm/nouveau/nouveau_display.c @@ -364,7 +364,9 @@ nouveau_vblank_enable(struct drm_device *dev, int crtc) { struct drm_nouveau_private *dev_priv = dev->dev_private; - if (dev_priv->card_type >= NV_50) + if (dev_priv->card_type >= NV_D0) + nv_mask(dev, 0x6100c0 + (crtc * 0x800), 0x5, 0x5); + else if (dev_priv->card_type >= NV_50) nv_mask(dev, NV50_PDISPLAY_INTR_EN_1, 0, NV50_PDISPLAY_INTR_EN_1_VBLANK_...