search for: disjuncts

Displaying 20 results from an estimated 51 matches for "disjuncts".

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2012 Dec 27
1
Conjunction and disjunction in pubmed query
Hi: I am trying to query pubmed abstracts using the following syntax: url= "http://eutils.ncbi.nlm.nih.gov/entrez/eutils/esearch.fcgi?" search = paste(url, "db=pubmed&term=", queryTerm1, "+AND+", queryTerm2,"+OR+",queryTerm3, "+OR+", queryTerm4, "[abstract]&retmax=100&usehistory=y", sep="") docId <-
2005 Jan 22
0
statistical test improvement of readability (was average disjunction)
Dear all ReadeRs I was finding a quick method to improve test readability adding or constructing (with your help....) one or more function that allow what follow. Please consider Trt<-c(1,1,1,1,2,2,2,2,3,3,3,3,4,4,4,4,5,5,5,5) Block<-c(1,2,3,4,1,2,3,4,1,2,3,4,1,2,3,4,1,2,3,4) AD2DAT<-c(1.44,2.32,1.68,1.28,0.12,0.08,0.24,0.52,0.12,0.08,0.16,0.28,0.16,0.08,0.12,0.12,0.16,0.08,0.32,0.76)
2017 Feb 06
2
Adding Extended-SSA to LLVM
On Sun, Feb 5, 2017 at 3:41 PM, Nuno Lopes <nunoplopes at sapo.pt> wrote: > Thanks for the answers! The plan makes sense to me. > > Regarding phis, what about diamonds, e.g.: > > > define i32 @f(i32 %x) { > br .., label %bb0, label %bb1 > bb0: > %cmp = icmp sge i32 %x, 0 ; x > 0 > br i1 %cmp, label %bb2, label %bb3 > bb1: > %x2 = add nsw
2017 May 14
2
RFC: Representing unions in TBAA
On Sun, May 14, 2017 at 8:37 AM, Hal Finkel <hfinkel at anl.gov> wrote: > > On 03/01/2017 05:30 PM, Daniel Berlin via llvm-dev wrote: > > So, https://bugs.llvm.org/show_bug.cgi?id=32056 is an example showing our > current TBAA tree for union generation is definitely irretrievably broken. > I'll be honest here. I'm pretty sure your proposal doesn't go far
2010 Aug 02
3
Using apply for logical conditions
Hi, I've got some boolean data in a data.frame in the form: X Y Z A B C [1] T T F T F F [2] F T T F F F . . . What I want to do is create a new column which is the logical disjunction of several of the columns. Just like: new.column <- data$X | data$Y | data$Z However I don't want to hard code the particular columns into the
2013 Oct 08
1
nut-2.6.5:rhino.c:190: bad if test ?
Hello there, Offending source code is ????? if(? ( BattVoltage> 129 ) || ( BattVoltage < 144 ) ) Maybe swap || for && would be better. This problem I found by using cppcheck. It said [rhino.c:190]: (warning) Logical disjunction always evaluates to true: BattVoltage> 129 || BattVoltage < 144. Regards David Binderman
2004 Mar 04
1
Re. : Re: Re: Multiple DB / fragmented information
Hi, Maybe using LDAP REFERRAL ??? ----------------------------------- St?phane PURNELLE stephane.purnelle@corman.be Service Informatique Corman S.A. Tel : 00 32 087/342467 |---------+---------------------------------------------------------> | | "Lapin(c)" <lapin@linagora.com> | | |
2020 Feb 27
2
[Bug 1409] New: nft manpage makes confusing reference to logical operators
https://bugzilla.netfilter.org/show_bug.cgi?id=1409 Bug ID: 1409 Summary: nft manpage makes confusing reference to logical operators Product: nftables Version: unspecified Hardware: All OS: All Status: NEW Severity: enhancement Priority: P5 Component: nft
2012 Apr 01
2
Project: QueryParser Reimplementation, to Olly Betts and Dan Colish
*Hi all,* * * *The following is my general idea for the project. For a complete query parser I still need to consider more details. Please give me feedback because the description of this project is lack of detailed information, and I can submit my proposal without giant deviation.* * * design principle of query parsing: 1) better understanding user input. All search engine do is understanding
2017 Oct 10
2
Expose aliasing information in getModRefInfo (or viceversa?)
> > Sigh > I should have taken the time to give a better example. > The must-alias part is irrelevant to an example (it only requires > read-onlyness) > > You said "LICM doesn't move calls, so we'd never really care about > must-alias for promotion". I was just pointing out other things move calls > any may want to know. > > If you want an example
2005 Jul 11
2
[LLVMdev] Does the gcc frontend do inlining or deadcode elimination ?
This didn't work as I tried with 197.parser. it works without "-Wl,-disable-opt" switch though. [197.parser]$ llvm-gcc analyze-linkage.c and.c build-disjuncts.c extract-links.c fast-match.c idiom.c main.c massage.c parse.c post-process.c print.c prune.c read-dict.c utilities.c xalloc.c word-file.c strncasecmp.c -Wa,-disable-opt -Wl,-disable-opt -lm -o llvm_parser [197.parser]$ opt -inline -inline-threshold=200 < llvm_parser.bc | llc -march=c >...
2017 Oct 10
2
Expose aliasing information in getModRefInfo (or viceversa?)
I'm trying to understand what is the result we'd seek in the example in D38569 (pasting here for quick access) double f(double a) { double b; double c,d; double (*fp) (double) __attribute__ ((const)); /* Partially redundant call */ if (a < 2.0) { fp = sin; c = fp (a); } else { c = 1.0; fp = cos; } d = fp (a);
2005 Jul 12
0
[LLVMdev] Does the gcc frontend do inlining or deadcode elimination ?
On Mon, 11 Jul 2005, Long Fei wrote: > > This didn't work as I tried with 197.parser. it works without > "-Wl,-disable-opt" switch though. > > [197.parser]$ llvm-gcc analyze-linkage.c and.c build-disjuncts.c > extract-links.c fast-match.c idiom.c main.c massage.c parse.c post-process.c > print.c prune.c read-dict.c utilities.c xalloc.c word-file.c strncasecmp.c > -Wa,-disable-opt -Wl,-disable-opt -lm -o llvm_parser Note that this will do NO optimization at all, giving you a very very ugl...
2017 May 14
2
RFC: Representing unions in TBAA
On Sun, May 14, 2017 at 10:20 AM, Hal Finkel <hfinkel at anl.gov> wrote: > > On 05/14/2017 11:06 AM, Daniel Berlin wrote: > > > > On Sun, May 14, 2017 at 8:37 AM, Hal Finkel <hfinkel at anl.gov> wrote: > >> >> On 03/01/2017 05:30 PM, Daniel Berlin via llvm-dev wrote: >> >> So, https://bugs.llvm.org/show_bug.cgi?id=32056 is an example
2016 Apr 22
2
if-conversion
Hi. I'm trying to vectorize the following piece of code with Loop Vectorizer (from LLVM distribution Nov 2015), but no vectorization takes place: int *Test(int *res, int *c, int *d, int *p) { int i; for (i = 0; i < 16; i++) { //res[i] = (p[i] == 0) ? c[i] : d[i]; res[i] = (p[i] == 0) ? res[i] : res[i] + d[i];
2013 Oct 28
2
[LLVMdev] Loop vectorizer dosen't find loop bounds
Bingo! That works (when coming from C source) Now, I have a serious problem. I am not coming from C but I build the function with the builder. I am also forced to change the signature and load the pointers a,b,c afterwards: define void @bar([8 x i8]* nocapture readonly %arg_ptr) #0 { entrypoint: %0 = bitcast [8 x i8]* %arg_ptr to i32* %1 = load i32* %0, align 4 %2 = getelementptr [8 x
2013 Oct 28
0
[LLVMdev] Loop vectorizer dosen't find loop bounds
----- Original Message ----- > Bingo! That works (when coming from C source) > > Now, I have a serious problem. I am not coming from C but I build the > function with the builder. I am also forced to change the signature > and > load the pointers a,b,c afterwards: > > define void @bar([8 x i8]* nocapture readonly %arg_ptr) #0 { > entrypoint: > %0 = bitcast [8 x
2013 Oct 29
2
[LLVMdev] Loop vectorizer dosen't find loop bounds
Thanks for the alternatives! I am trying the 'extracting sub-function' approach. However, it seems I can't get the 'subfunction' to pass the verifier. This is my subfunction: define void @main_extern([8 x i8]* %arg_ptr) { entrypoint: %0 = getelementptr [8 x i8]* %arg_ptr, i32 0 %1 = bitcast [8 x i8]* %0 to i64* %2 = load i64* %1 %3 = getelementptr [8 x i8]*
2016 Apr 23
2
if-conversion
Hi, > On Apr 22, 2016, at 8:27 PM, Hal Finkel via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hi Rob, > > The problem here is that the d[i] array is only conditionally accessed, and so we can't if-convert the loop body. The compiler does not know that d[i] is actually dereferenceable for all i from 0 to 15 (the array might be shorter and p[i] is 0 for i past the end
2011 Oct 21
0
[LLVMdev] Problems with live intervals and spilling when having sub registers?
Hi, I'm having some trouble understanding if the live intervals calculated for one of my testcases are correct or not. I have the following instructions: 272L %vreg67:lo<def> = mv_any16 65535; R:%vreg67 288L %vreg64:hi<def> = mv_any16 16383; R:%vreg64 304L %vreg64:lo<def> = COPY %vreg67:lo; R:%vreg64,%vreg67 320L %vreg6<def> = COPY %vreg64<kill>;