Displaying 20 results from an estimated 519 matches for "dev_private".
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2010 Feb 25
3
[PATCH 1/3] drm/nv50: Implement ctxprog/state generation.
...TA, cp[i]);
+ } else {
+ dev_priv->engine.graph.accel_blocked = true;
+ }
+ kfree(cp);
+ }
nv_wr32(dev, 0x400320, 4);
nv_wr32(dev, NV40_PGRAPH_CTXCTL_CUR, 0);
@@ -193,13 +195,13 @@ nv50_graph_create_context(struct nouveau_channel *chan)
struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nouveau_gpuobj *ramin = chan->ramin->gpuobj;
struct nouveau_gpuobj *ctx;
- uint32_t grctx_size = 0x70000;
+ struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
int hdr, ret;
NV_DEBUG(dev, "ch%d\n", chan->id);
- ret = nouveau_gpuobj_new_ref(d...
2009 Dec 19
1
[PATCH] drm/nouveau: always do buffer object moves on bo->channel
...b/drivers/gpu/drm/nouveau/nouveau_state.c
index 6a45913..c9757f2 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -321,46 +321,10 @@ static int
nouveau_card_init_channel(struct drm_device *dev)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_gpuobj *gpuobj;
- int ret;
- ret = nouveau_channel_alloc(dev, &dev_priv->channel,
+ return nouveau_channel_alloc(dev, &dev_priv->channel,
(struct drm_file *)-2,
NvDmaFB, NvDmaTT);
- if (ret)
- return ret;
-
- gpuobj = NULL;
- ret = nouveau_gpuobj...
2010 Feb 07
3
[PATCH] drm/nouveau: don't hold spin lock while calling kzalloc with GFP_KERNEL
...uveau/nv04_fifo.c
index f31347b..66fe559 100644
--- a/drivers/gpu/drm/nouveau/nv04_fifo.c
+++ b/drivers/gpu/drm/nouveau/nv04_fifo.c
@@ -117,6 +117,7 @@ nv04_fifo_create_context(struct nouveau_channel *chan)
{
struct drm_device *dev = chan->dev;
struct drm_nouveau_private *dev_priv = dev->dev_private;
+ unsigned long flags;
int ret;
ret = nouveau_gpuobj_new_fake(dev, NV04_RAMFC(chan->id), ~0,
@@ -127,6 +128,8 @@ nv04_fifo_create_context(struct nouveau_channel *chan)
if (ret)
return ret;
+ spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
+
/* Setup initial state...
2009 Jul 25
2
[RFC] patch 0/4: DRM MMIO accessor cleanup
Hi,
this is continuation for the MMIO accessor rewrite and cleanup.
I am currently running nv28 with these patches applied, but
I cannot test on PPC.
Please, review and comment. If the direction is good, I'll do the
same to INSTANCE_{RD,WR} as I did for nv_{rd,wr}32, and change
PRAMIN from drm_local_map to simple ioremap.
Can the same be done for channel specific mappings, that is
2009 Aug 19
1
[PATCH] drm/nouveau: Add a MM for mappable VRAM that isn't usable as scanout.
...v_priv->ttm.bdev, TTM_PL_VRAM);
ttm_bo_device_release(&dev_priv->ttm.bdev);
@@ -410,6 +412,17 @@ uint64_t nouveau_mem_fb_amount(struct drm_device *dev)
return 0;
}
+static uint64_t nouveau_mem_scanout_limit(struct drm_device *dev)
+{
+ struct drm_nouveau_private *dev_priv=dev->dev_private;
+ uint64_t vram_size = dev_priv->fb_available_size;
+
+ if (dev_priv->card_type == NV_04)
+ return min(16ull*1024*1024, vram_size);
+
+ return vram_size;
+}
+
static void nouveau_mem_reset_agp(struct drm_device *dev)
{
uint32_t saved_pci_nv_1, saved_pci_nv_19, pmc_enable;
@@ -482,7 +495...
2009 Nov 19
2
[RFC] nouveau: Add basic i2c sensor chip support
...fset, &BIT_TABLE('P', performance));
return 0;
}
@@ -5252,6 +5302,7 @@ static int parse_dcb_table(struct drm_device *dev, struct nvbios *bios, bool two
{
struct bios_parsed_dcb *bdcb = &bios->bdcb;
struct parsed_dcb *dcb;
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
uint16_t dcbptr, i2ctabptr = 0;
uint8_t *dcbtable;
uint8_t headerlen = 0x4, entries = DCB_MAX_NUM_ENTRIES;
@@ -5357,8 +5408,19 @@ static int parse_dcb_table(struct drm_device *dev, struct nvbios *bios, bool two
NV_WARN(dev, "No pointer to DCB I2C port table\n");
else {
bdcb...
2012 Apr 25
5
[PATCH v2 4/4] drm/nouveau: gpu lockup recovery
...rwsem);
+ mutex_unlock(&r->mutex);
+}
+
+static long nouveau_ioctl(struct file *filp,
+ unsigned int cmd, unsigned long arg)
+{
+ struct drm_file *file_priv = filp->private_data;
+ struct drm_device *dev = file_priv->minor->dev;
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+ long ret = intr_rwsem_down_read_interruptible(&dev_priv->ioctls_rwsem);
+ if (ret)
+ return ret;
+
+ ret = drm_ioctl(filp, cmd, arg);
+
+ intr_rwsem_up_read(&dev_priv->ioctls_rwsem);
+
+ return ret;
+}
+
static const struct file_operations nouveau_driver_fops = {
.owner = THI...
2020 Apr 15
1
[PATCH 27/59] drm/qxl: Don't use drm_device->dev_private
...644
--- a/drivers/gpu/drm/qxl/qxl_debugfs.c
+++ b/drivers/gpu/drm/qxl/qxl_debugfs.c
@@ -39,7 +39,7 @@ static int
qxl_debugfs_irq_received(struct seq_file *m, void *data)
{
struct drm_info_node *node = (struct drm_info_node *) m->private;
- struct qxl_device *qdev = node->minor->dev->dev_private;
+ struct qxl_device *qdev = to_qxl(node->minor->dev);
seq_printf(m, "%d\n", atomic_read(&qdev->irq_received));
seq_printf(m, "%d\n", atomic_read(&qdev->irq_received_display));
@@ -53,7 +53,7 @@ static int
qxl_debugfs_buffers_info(struct seq_file *m, v...
2020 Apr 03
1
[PATCH 31/44] drm/qxl: Don't use drm_device->dev_private
...644
--- a/drivers/gpu/drm/qxl/qxl_debugfs.c
+++ b/drivers/gpu/drm/qxl/qxl_debugfs.c
@@ -39,7 +39,7 @@ static int
qxl_debugfs_irq_received(struct seq_file *m, void *data)
{
struct drm_info_node *node = (struct drm_info_node *) m->private;
- struct qxl_device *qdev = node->minor->dev->dev_private;
+ struct qxl_device *qdev = to_qxl(node->minor->dev);
seq_printf(m, "%d\n", atomic_read(&qdev->irq_received));
seq_printf(m, "%d\n", atomic_read(&qdev->irq_received_display));
@@ -53,7 +53,7 @@ static int
qxl_debugfs_buffers_info(struct seq_file *m, v...
2012 Apr 22
2
[RFC PATCH 5/5] drm/nouveau: gpu lockup recovery
...bugfs_fini(struct drm_minor *minor) {}
+static inline void nouveau_reset_debugfs_init(struct drm_minor *minor) {}
+#endif
+int nouveau_reset_device(struct drm_device *dev);
+static inline bool nouveau_gpu_reset_in_progress(struct drm_device *dev)
+{
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ return atomic_read(&dev_priv->gpureset_in_progress) != 0;
+}
/* nv10_gpio.c */
int nv10_gpio_init(struct drm_device *dev);
@@ -1632,12 +1651,20 @@ static inline void nv_wr08(struct drm_device *dev, unsigned reg, u8 val)
iowrite8(val, dev_priv->mmio + reg);
}
+static inline uin...
2009 Dec 11
5
[PATCH 1/3] drm/nouveau: Pre-G80 tiling support.
...+++ b/drivers/gpu/drm/nouveau/nv10_fb.c
@@ -3,17 +3,37 @@
#include "nouveau_drv.h"
#include "nouveau_drm.h"
+void
+nv10_fb_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+ uint32_t size, uint32_t pitch)
+{
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ uint32_t limit = max(1u, addr + size) - 1;
+
+ if (pitch) {
+ if (dev_priv->card_type >= NV_20)
+ addr |= 1;
+ else
+ addr |= 1 << 31;
+ }
+
+ nv_wr32(dev, NV10_PFB_TLIMIT(i), limit);
+ nv_wr32(dev, NV10_PFB_TSIZE(i), pitch);
+ nv_wr32(dev, NV10_PFB_TILE(i), addr);
+}
+
int
n...
2010 Jun 01
1
"typo" in "drm/nv50: cast IGP memory location to u64 before shifting"
Hi
This does not look right:
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c
index 775a701..c1fd42b 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -540,7 +540,8 @@ nouveau_mem_detect(struct drm_device *dev)
dev_priv->vram_size = nv_rd32(dev, NV04_FIFO_DATA);
dev_priv->vram_size &=
2009 Feb 18
1
[PATCH] Add in-kernel backlight control support
...t;
+
+#include "drmP.h"
+#include "nouveau_drv.h"
+#include "nouveau_drm.h"
+#include "nouveau_reg.h"
+
+static int nv40_get_intensity(struct backlight_device *bd)
+{
+ struct drm_device *dev = bl_get_data(bd);
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ int val = (NV_READ(NV40_PMC_BACKLIGHT) & NV40_PMC_BACKLIGHT_MASK) >> 16;
+
+ return val;
+}
+
+static int nv40_set_intensity(struct backlight_device *bd)
+{
+ struct drm_device *dev = bl_get_data(bd);
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ int val = bd->prop...
2010 Feb 01
4
[PATCH 1/3] Introduce nouveau_bo_wait for waiting on a BO with a GPU channel
nouveau_bo_wait will make the GPU channel wait for fence if possible,
otherwise falling back to waiting with the CPU using ttm_bo_wait.
The nouveau_fence_sync function currently returns -ENOSYS, and is
the focus of the next patch.
Signed-off-by: Luca Barbieri <luca at luca-barbieri.com>
---
drivers/gpu/drm/nouveau/nouveau_bo.c | 68 ++++++++++++++++++++++++++++++-
2009 Aug 02
3
[PATCH 1/4] drm/nouveau: refactor VGA font save/restore
...val)
#define nv_wait(reg,mask,val) nouveau_wait_until(dev, 2000000000ULL, (reg), \
(mask), (val))
-/*
- * VRAM access for the first 64kB
- * see nouveau_state.c
- */
-static inline u32 nv_rf32(struct drm_device *dev, unsigned offset)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- return ioread32_native(dev_priv->fb + offset);
-}
-
-static inline void nv_wf32(struct drm_device *dev, unsigned offset, u32 val)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- iowrite32_native(val, dev_priv->fb + offset);
-}
-
/* PRAMIN access */
static inline u32 nv...
2011 Nov 06
0
[PATCH] drm/nouveau: add nouveau.vram_limit module option
...6bec48..3330d6c 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -240,6 +240,21 @@ nouveau_mem_detect_nforce(struct drm_device *dev)
return 0;
}
+void nouveau_limit_vram(struct drm_device *dev)
+{
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ u64 tmp;
+ if (!nouveau_vram_limit)
+ return;
+
+ tmp = min((u64)(nouveau_vram_limit << 20), dev_priv->vram_size);
+ if (tmp != dev_priv->vram_size) {
+ NV_INFO(dev, "limiting size of VRAM to %d MiB (from %d MiB)\n",
+ (int)(tmp >> 20), (int)(dev_priv->vram_si...
2008 Mar 09
0
[PATCH 4/4] nouveau: clean up nouveau_mem_alloc function
...)
+ goto error;
+
+ return block;
+error:
+ nouveau_mem_free_block(block);
+ return NULL;
+}
+
+static struct mem_block *
+nouveau_mem_alloc_pci(struct drm_device *dev, uint64_t size, int alignment,
+ int flags, struct drm_file *file_priv)
+{
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+ return __nouveau_mem_alloc(dev, NOUVEAU_MEM_PCI, dev_priv->pci_heap,
+ size, alignment, flags, file_priv);
+}
+
+static struct mem_block *
+nouveau_mem_alloc_agp(struct drm_device *dev, uint64_t size, int alignment,
+ int flags, struct drm_file *file_priv)
+{
+ struct drm_nouve...
2010 Feb 09
2
[PATCH 1/3] Introduce nouveau_bo_wait for waiting on a BO with a GPU channel (v2)
Changes in v2:
- Addressed review comments
nouveau_bo_wait will make the GPU channel wait for fence if possible,
otherwise falling back to waiting with the CPU using ttm_bo_wait.
The nouveau_fence_sync function currently returns -ENOSYS, and is
the focus of the next patch.
Signed-off-by: Luca Barbieri <luca at luca-barbieri.com>
---
drivers/gpu/drm/nouveau/nouveau_bo.c | 68
2012 Feb 03
3
[PATCH 1/4] nouveau: Allow allocating BOs at specific offsets
...0_vram_new(struct drm_device *dev, u64 size, u32 align, u32 size_nc,
- u32 memtype, struct nouveau_mem **pmem)
+nv50_vram_new(struct drm_device *dev, u32 base, u64 size, u32 align,
+ u32 size_nc, u32 memtype, struct nouveau_mem **pmem)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nouveau_mm *mm = &dev_priv->engine.vram.mm;
@@ -91,6 +92,8 @@ nv50_vram_new(struct drm_device *dev, u64 size, u32 align, u32 size_nc,
if (!types[type])
return -EINVAL;
+
+ base >>= 12;
size >>= 12;
align >>= 12;
size_nc >>= 12;
@@ -120,7 +123,8...
2012 Jul 27
0
[PATCH 3/3] nouveau: add vblank methods on newer cards
...c b/drivers/gpu/drm/nouveau/nouveau_display.c
index 69688ef..fa0cf14 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -364,7 +364,9 @@ nouveau_vblank_enable(struct drm_device *dev, int crtc)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
- if (dev_priv->card_type >= NV_50)
+ if (dev_priv->card_type >= NV_D0)
+ nv_mask(dev, 0x6100c0 + (crtc * 0x800), 0x5, 0x5);
+ else if (dev_priv->card_type >= NV_50)
nv_mask(dev, NV50_PDISPLAY_INTR_EN_1, 0,
NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc));
else
@@ -379,7 +...