Displaying 2 results from an estimated 2 matches for "dest_reg".
Did you mean:
dest_reg2
2012 Jan 14
0
[LLVMdev] TableGen: Avoid/Ignore the "no immediates on RHS of commutative node" constraint.
...instruction depending on an SDNode's properties,
e.g. if the SDNode is not commutative.
2. Override/ignore the TableGen error given when a commutative node has an
immediate on the LHS.
My case comes from trying to define a generic ALU operation multiclass for
my target, which includes a "dest_reg,immediate,src_reg" format. This is
disallowed for commutative SDAG nodes (e.g. 'add') in LLVM, as the RHS
cannot be an immediate (I assume for optimization purposes). I think I
could achieve this with nested multiclasses, e.g.:
multiclass ALUOp<..> {
...
}
multiclass ALUOp_not_...
2012 Jan 14
0
[LLVMdev] TableGen: Avoid/Ignore the "no immediates on RHS of commutative node" constraint.
...operties, e.g. if the SDNode is not commutative.
>> 2. Override/ignore the TableGen error given when a commutative node has
>> an immediate on the LHS.
>>
>> My case comes from trying to define a generic ALU operation multiclass
>> for my target, which includes a "dest_reg,immediate,src_reg" format.
>> This is disallowed for commutative SDAG nodes (e.g. 'add') in LLVM, as
>> the RHS cannot be an immediate (I assume for optimization purposes). I
>> think I could achieve this with nested multiclasses, e.g.:
>>
>>
> If your...