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...shrink-wrapping is doing the right thing. + %0 = load i32, i32* @g1, align 4 Please use opt -instnamer to get rid of the numbered variables. Those are a pain when updating the tests :). Other than that LGTM! Cheers, -Quentin > On Nov 20, 2015, at 6:31 AM, Arnaud A. de Grandmaison <arnaud.degrandmaison at arm.com> wrote: > > +CC llvm-dev > >> -----Original Message----- >> From: Arnaud A. de Grandmaison [mailto:arnaud.degrandmaison at arm.com] >> Sent: 20 November 2015 15:28 >> To: 'qcolombet at apple.com' >> Cc: 'haicheng at codeaurora.org...

Hi Quentin, After shrink-wrapping was enabled as default on AArch64, llc has a seg fault when compiling the attached .ll file on AArch64. My command is llc -mcpu=cortex-a57 bug.ll Best, Haicheng -------------- next part -------------- A non-text attachment was scrubbed... Name: bug.ll Type: application/octet-stream Size: 8983 bytes Desc: not available URL:

...Message----- > From: Renato Golin [mailto:renato.golin at linaro.org] > Sent: 30 May 2016 20:42 > To: Arnaud De Grandmaison > Cc: Kristof Beyls; nd; llvm-dev at lists.llvm.org > Subject: Re: LNT General Failure > > On 30 May 2016 at 12:25, Arnaud De Grandmaison > <Arnaud.DeGrandmaison at arm.com> wrote: > > I confirm this is due to the latest Flask --- Flask-0.11 was released > > this weekend --- and for some unknown (to me at least) reason, > > although LNT's requirements.txt pins Flask to version 0.10.1, pip installs > Flask-0.11. > > Forcing...

I hope I've fixed this properly just now in http://llvm.org/viewvc/llvm-project?view=revision&revision=271274. Fingers crossed that the bots will come back now... On 30 May 2016, at 21:01, Arnaud De Grandmaison <Arnaud.DeGrandmaison at arm.com<mailto:Arnaud.DeGrandmaison at arm.com>> wrote: I honestly do not know how to fix that --- I would otherwise I've committed a fix. I've been able to hack it locally exploiting the very same lit limitation then the one we're stumbling on (i.e it does not resolve dep...

...re ? Thanks, Arnaud From: Lang Hames [mailto:lhames at gmail.com] Sent: 10 September 2014 19:26 To: Arnaud De Grandmaison Subject: Re: Leaks in PBQPBuilderWithCoalescing::build ? Thanks Arnaud! - Lang. On Wed, Sep 10, 2014 at 11:23 AM, Arnaud A. de Grandmaison <arnaud.degrandmaison at arm.com> wrote: Hi Lang, For your information, the leak sanitizer found something when I committed my patch: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/4506/steps/check-llvm%20asan/logs/stdio I will try to have a look at it. Cheers, -- Arnaud...

...;llvm-dev at lists.llvm.org> wrote: > > I hope I've fixed this properly just now in http://llvm.org/viewvc/llvm-project?view=revision&revision=271274. > Fingers crossed that the bots will come back now... > >> On 30 May 2016, at 21:01, Arnaud De Grandmaison <Arnaud.DeGrandmaison at arm.com> wrote: >> >> I honestly do not know how to fix that --- I would otherwise I've committed a fix. >> >> I've been able to hack it locally exploiting the very same lit limitation then the one we're stumbling on (i.e it does not resolve dependency co...

...a harvesting schedule, rather than with a direct callback as > is currently implemented))​ > pbqp_leak.diff > <https://docs.google.com/file/d/0B0jpkch3iC_7TXFVU2hCcUpfZXM/edit?usp=drive_web> > ​ > > On Wed, Sep 10, 2014 at 3:19 PM, Arnaud A. de Grandmaison < > arnaud.degrandmaison at arm.com> wrote: > >> Hi Lang, >> >> >> >> In PBQPBuilderWithCoalescing::build, around line 360, we have code >> looking like: >> >> >> >> … >> >> PBQP::Vector newCosts(g.getNodeCosts(node)); >> >> addPhysRe...

...lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> wrote: I hope I've fixed this properly just now in http://llvm.org/viewvc/llvm-project?view=revision&revision=271274. Fingers crossed that the bots will come back now... On 30 May 2016, at 21:01, Arnaud De Grandmaison <Arnaud.DeGrandmaison at arm.com<mailto:Arnaud.DeGrandmaison at arm.com>> wrote: I honestly do not know how to fix that --- I would otherwise I've committed a fix. I've been able to hack it locally exploiting the very same lit limitation then the one we're stumbling on (i.e it does not resolve dep...

...kel [mailto:hfinkel at anl.gov] > Sent: 04 November 2014 17:16 > To: Arnaud De Grandmaison > Cc: LLVM Developers Mailing List > Subject: Re: [LLVMdev] lifetime.start/end clarification > > ----- Original Message ----- > > From: "Arnaud A. de Grandmaison" <arnaud.degrandmaison at arm.com> > > To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > > Sent: Tuesday, November 4, 2014 5:59:28 AM > > Subject: [LLVMdev] lifetime.start/end clarification > > > > The LRM > > (http://llvm.org/docs/LangRef.html#llvm-lifet...

...all with live-range splitting as it would change some allocation decisions that were supposed to be final. The bottom line is I do not believe there is much to share here. Cheers, -Quentin What do you think about this? /Jonas From: Arnaud A. de Grandmaison [mailto:arnaud.degrandmaison at arm.com] Sent: den 4 mars 2015 15:43 To: Jonas Paulsson; Lang Hames Cc: llvmdev at cs.uiuc.edu Subject: RE: PBQP spilling Yes, for now the spilling is done in the most basic way, i.e. it’s functionally correct --- but not efficient. The focus was on the allocator itself, not on the spilling...

...hout "-mcpu=cortex-a57". I'm new to LLVM so I'm not familiar with what optimization flags are available. I tried poking around in the LLVM documentation but haven't found a definitive list. The clang man page is skimpy on details. From: Arnaud A. de Grandmaison [mailto:arnaud.degrandmaison at arm.com] Sent: Monday, February 09, 2015 2:11 PM To: Ralph Campbell Cc: llvmdev at cs.uiuc.edu Subject: RE: aarch64 status for generating SIMD instructions Which compiler flags have you been using ? There is definitely support for AArch64's SIMD instructions, but their use depends on what...

Hi Lang, While working on improving the debug dumps of the PBQP graphs, I found out that we can have some edges between nodes which belong to totally disjoint register classes (for example, on AArch64, this would be an int and a floating point register). Although it is true those 2 registers interferes, in the sense they are alive at the same time, they never have any physical interference,

...–O3 and with & without “-mcpu=cortex-a57”. I’m new to LLVM so I’m not familiar with what optimization flags are available. I tried poking around in the LLVM documentation but haven’t found a definitive list. The clang man page is skimpy on details. From: Arnaud A. de Grandmaison [mailto:arnaud.degrandmaison at arm.com] Sent: Monday, February 09, 2015 2:11 PM To: Ralph Campbell Cc: llvmdev at cs.uiuc.edu<mailto:llvmdev at cs.uiuc.edu> Subject: RE: aarch64 status for generating SIMD instructions Which compiler flags have you been using ? There is definitely support for AArch64’s SIMD instruction...

...hat the code for doing this is local to that allocator. I would like to suggest a refactoring to make RAGreedy::trySplit() and its sub functions callable from any register allocator. Perhaps part of SplitEditor? What do you think about this? /Jonas From: Arnaud A. de Grandmaison [mailto:arnaud.degrandmaison at arm.com] Sent: den 4 mars 2015 15:43 To: Jonas Paulsson; Lang Hames Cc: llvmdev at cs.uiuc.edu Subject: RE: PBQP spilling Yes, for now the spilling is done in the most basic way, i.e. it's functionally correct --- but not efficient. The focus was on the allocator itself, not on the spilling...

On 30 May 2016 at 12:25, Arnaud De Grandmaison <Arnaud.DeGrandmaison at arm.com> wrote: > I confirm this is due to the latest Flask --- Flask-0.11 was released this > weekend --- and for some unknown (to me at least) reason, although LNT's > requirements.txt pins Flask to version 0.10.1, pip installs Flask-0.11. > Forcing Flask to 0.10.1 gets the...

...ange some allocation decisions > that were supposed to be final. > > The bottom line is I do not believe there is much to share here. > > Cheers, > -Quentin > > > What do you think about this? > > /Jonas > > > *From:* Arnaud A. de Grandmaison [mailto:arnaud.degrandmaison at arm.com > <arnaud.degrandmaison at arm.com>] > *Sent:* den 4 mars 2015 15:43 > *To:* Jonas Paulsson; Lang Hames > *Cc:* llvmdev at cs.uiuc.edu > *Subject:* RE: PBQP spilling > > Yes, for now the spilling is done in the most basic way, i.e. it’s > functionally correc...

Renato, Kristof, I confirm this is due to the latest Flask --- Flask-0.11 was released this weekend --- and for some unknown (to me at least) reason, although LNT's requirements.txt pins Flask to version 0.10.1, pip installs Flask-0.11. Forcing Flask to 0.10.1 gets the situation back to normal. Reading pip's documentation makes me think it's not able to resolve dependencies

...s one another then you can sum them to find the maximum number of registers that might be unavailable to this node. If this sum is lower than the number of registers available then you're safely allocatable. Cheers, Lang. On Mon, Jan 26, 2015 at 11:42 PM, Arnaud A. de Grandmaison < arnaud.degrandmaison at arm.com> wrote: > > A node should never be put into the conservatively allocatable list if > there is a chance of it spilling. > > > > I can understand why the logic of > NodeMetadata::isConservativelyAllocatable is necessary for the node to be > allocatable, but I...

The LRM (http://llvm.org/docs/LangRef.html#llvm-lifetime-start-intrinsic) essentially states that: - ptr is dead before a call to "lifetime.start size, ptr" - ptr is dead after a call to "lifetime.end size, ptr" This is all good and fine, and the expected use case is that all "lifetime.end size, ptr" markers are matched with a preceding "lifetime.start

...ow propagate neighboring affinities at the *reduction* stage, perhaps we might get a transitivity property emerging that could solve the above case optimally? I'm very much a newbie in this area so be gentle on me :) Cheers, James On Fri, 3 Jun 2016 at 15:33 Arnaud De Grandmaison <Arnaud.DeGrandmaison at arm.com<mailto:Arnaud.DeGrandmaison at arm.com>> wrote: Hi James, I’ve tried to play in the past with the allocation order, which can definitely be tweaked and improved. The metric we use for spill cost being what it is (i.e. not targeted for PBQP, but that’s a different subject), I fo...