search for: dangeti

Ugh, that would be a “yes” then… -- Krzysztof Parzyszek kparzysz at quicinc.com<mailto:kparzysz at quicinc.com> AI tools development From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of Krzysztof Parzyszek via llvm-dev Sent: Friday, September 27, 2019 10:05 AM To: Dangeti Tharun kumar <cs15mtech11002 at iith.ac.in>; llvm-dev at lists.llvm.org Subject: [EXT] Re: [llvm-dev] Question on target-features No. The way +feature works is that it causes the assignment Attribute=Value to happen, where Attribute and Value are strings defined in a td file. With -feature...

...d the vectorizer doesn’t remark about it, or it doesn’t it have the functionality at all? Finally, we appreciate suggestions and directions for improving the vectorization framework of LLVM. I would also like to know if anyone worked or is working on improving vectorization remarks. Regards, Dangeti Tharun kumar M.TECH Computer Science IIT Hyderabad -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160623/2b0d66c8/attachment.html>

Hi Dangeti, Ramakrishna, Adam, and Gerolf, >Yes this is an area that needs further improvement. We have some immediate plans to make these more useful. See the recent llvm-dev threads [1], [2]. It takes a lot of dedicated effort to make vectorization report easier to understand by ordinary programmers...

Hi, The call graphs generated by "*llvm-xray graph*" has function names, while the "*llvm-xray graph-diff*" doesn't shows function names. This is the command I am using llvm-xray graph-diff xray-log.clang.1 xray-log.clang.2 -instr-map=../xray-build/bin/clang -o diff.dot Attached is the portion of the generated diff graph. Am I missing any flag? [image: graph_diff.jpg]

On Mon, Jan 7, 2019 at 3:21 PM Dean Michael Berris <dean.berris at gmail.com> wrote: > On Mon, Jan 7, 2019 at 8:43 PM Dangeti Tharun kumar > <cs15mtech11002 at iith.ac.in> wrote: > > > > Hi Dean, > > > > I have tried with -instr-map-1 and -instr-map-2, it didn't work. > > > > Yeah, I'm looking through the code and it looks like we're always just > using the funct...

Hi Dean, I have tried with -instr-map-1 and -instr-map-2, it didn't work. Is there a way to find the function name from the identifier? -DTharun On Mon, Jan 7, 2019 at 2:29 PM Dean Michael Berris <dean.berris at gmail.com> wrote: > Hi Dangeti, > > That's interesting -- can you try providing both `-instr-map-1=` and > `-instr-map-2=` even though they're the same binary? > > If that doesn't work then it sounds like a bug. > > Cheers > > On Mon, Jan 7, 2019 at 7:32 PM Dangeti Tharun kumar via llvm-dev...

Hi, I am working with SCEVs, I see the unsigned division of SCEVs, it is not immediately clear to me why the signed division of SCEV expressions is not supported by SE? I would appreciate if some could clarify or point me to some links. -- Regards, DTharun -------------- next part -------------- An HTML attachment was scrubbed... URL:

Hi, In "target-features" list in LLVM-IR, there are "+feature", "-feature". My question is, does "-feature" is equivalent to not specifying a feature at all? For example: *attributes #0 = { "target-cpu"="znver2" "target-features"="+avx -avx2" }* Wheather it is equalent to omitting the avx2 from list? *attributes #0

...f yet that using xmm10-xmm15 would have helped in this > function... > Yes, I am compiling for linux system. So the RA will not consider assigning a scratch register to a live range crossing function call, though it may reduce spills? > - Matthias > > On Oct 30, 2018, at 12:24 AM, Dangeti Tharun kumar via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > Hi Craig, > > The test case is from spec-17. > > The attached is the assembly file for the function MeanShiftImage from > spec17/538.imagick_r/src/magick/feature.c. > As I was saying, registers XMM...

> On Oct 10, 2016, at 2:50 PM, Hal Finkel <hfinkel at anl.gov> wrote: > > > From: "Dangeti Tharun kumar via llvm-dev" <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> > To: llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org> > Cc: "Santanu Das" <cs15mtech11018 at iith.ac.in <mailto:cs15mtech11018 at iith.ac.in>&gt...

...ne can give us a clear answer. Thanks, Hideki Saito Intel Compilers and Languages -----Original Message----- From: ghoflehner at apple.com [mailto:ghoflehner at apple.com] Sent: Wednesday, August 24, 2016 5:38 PM To: Saito, Hideki <hideki.saito at intel.com> Cc: llvm-dev at lists.llvm.org; Dangeti Tharun kumar <cs15mtech11002 at iith.ac.in>; Santanu Das <cs15mtech11018 at iith.ac.in> Subject: Re: [llvm-dev] Questions on LLVM vectorization diagnostics Has there been a follow up? I’m very interested in specific examples underlying the key design decisions. Specifically I expect th...

On Fri, Nov 2, 2018 at 3:31 PM Anton Korobeynikov <anton at korobeynikov.info> wrote: > > Yes, I am compiling for linux system. > > So the RA will not consider assigning a scratch register to a live range > crossing function call, though it may reduce spills? > Well, it has to spill the register – otherwise it could be clobbered by a > call. May be, I haven't

Hi, I have a doubt regarding *getAnalysisUsage.* My assumption is that, as analysis passes will not change the IR, all the passes required by an analysis pass should be preserved. Say, I have an analysis pass which requires another analysis pass called *SomeAnalysis* and I have not added *AU.addPreserved<SomeAnalysis>() *to my pass. Would the pass manager still considers the *SomeAnlaysis

Dear community, Our team at IITH have been experimenting with loop-distribution pass in LLVM. We see the following results on few benchmarks. clang -O3 -mllvm -enable-loop-distribute -Rpass=loop-distribute file.c clang -O3 -mllvm -enable-loop-distribute -Rpass-analysis=loop-distribute file.c TORCH

...h has posted an RFC on [avoiding giving a default CPU to the LTO plugin](http://lists.llvm.org/pipermail/llvm-dev/2018-March/121830.html). As was [determined](http://lists.llvm.org/pipermail/llvm-dev/2018-March/121845.html) later in the thread, the issue is slightly wider in scope than just LTO. * Dangeti Tharun Kumar is [seeking feedback](http://lists.llvm.org/pipermail/llvm-dev/2018-March/121736.html) on a proposal to add an LLVM front end for the P4 language (used for packet forwarding). * Artem Dergachev has offered an [update](http://lists.llvm.org/pipermail/cfe-dev/2018-March/057255.html) on...

Hello, I have studied register allocation in theoretical aspects and exploring the same in the implementation level. I need a minimal testcase for register spilling to analyze spilling procedure in llvm. I tried with a testcase taking 20 variables but all the 20 variables are getting stored in the stack using %rbp. Maybe my live variable analysis is wrong. Please help me with a minimal testcase

Hi Hideki, Thanks for the interesting writeup! > On Aug 27, 2016, at 7:15 AM, Renato Golin via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > On 25 August 2016 at 05:46, Saito, Hideki via llvm-dev > <llvm-dev at lists.llvm.org> wrote: >> Now, I have one question. Suppose we'd like to split the vectorization decision as an Analysis pass and vectorization

Dear community, We, a team at IIT Hyderabad are developing an LLVM front end for a networking language called P4 (https://p4.org/). Our work aims to enable LLVM based optimizations for P4. As the P4 language was designed to target many different switch architectures, we feel that P4 can comfortably fit in the LLVM framework where adding targets is more structured. The existing open-source P4

Hi, Can we attach metadata to StructTypes in LLVM IR? If not, is there any other way to add meta information? Thank you -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180522/46206b08/attachment.html>