Displaying 2 results from an estimated 2 matches for "d49072".
2018 Jul 11
3
RFC: Speculative Load Hardening (a Spectre variant #1 mitigation)
...t; The intrinsic is close to what Philip Reames suggested on
> https://reviews.llvm.org/D41761.
>
Cool, we'll definitely need *some* intrinsic in the IR to help model source
annotations. I still need to think a bit about the interface and model for
this...
>
> Then a later patch (D49072) adds automatic mitigation by inserting the
> intrinsic
> in necessary locations.
>
I was never able to get automatic mitigation with an intrinsic to avoid
really signiifcant performance problems in the x86 backend. I'll look
through your approach to see if you figured out a technique...
2018 Mar 23
5
RFC: Speculative Load Hardening (a Spectre variant #1 mitigation)
Hello all,
I've been working for the last month or so on a comprehensive mitigation
approach to variant #1 of Spectre. There are a bunch of reasons why this is
desirable:
- Critical software that is unlikely to be easily hand-mitigated (or where
the performance tradeoff isn't worth it) will have a compelling option.
- It gives us a baseline on performance for hand-mitigation.
- Combined