search for: d4796

Hello everyone, I have recently started on optimizing C11/C++11 atomics in LLVM, and plan to focus on that for the next two months as an intern in the PNaCl team. I’ve sent two patches on this topic to Phabricator that fix http://llvm.org/bugs/show_bug.cgi?id=17281: http://reviews.llvm.org/D4796 http://reviews.llvm.org/D4797 The first patch is X86-specific, and tries to apply operations with immediates to atomics without going through a register. The main trouble here is that the X86 backend appears to respect LLVM memory model instead of the x86-TSO memory model, and may reorder instru...