search for: d47769

Displaying 8 results from an estimated 8 matches for "d47769".

[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
2019 May 24
2
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...> `` > > ========== > 7. Patches > ========== > > List of patches: > > 1. Extend VectorType: https://reviews.llvm.org/D32530 > 2. Vector element type Tablegen constraint: https://reviews.llvm.org/D47768 > 3. LLT support for scalable vectors: https://reviews.llvm.org/D47769 > 4. EVT strings and Type mapping: https://reviews.llvm.org/D47770 > 5. SVE Calling Convention: https://reviews.llvm.org/D47771 > 6. Intrinsic lowering cleanup: https://reviews.llvm.org/D47772 > 7. Add VScale intrinsic: https://reviews.llvm.org/D47773 > 8. Add StepVector intrinsic: h...
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
2018 Jul 30
5
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...; `` > > ========== > 8. Patches > ========== > > List of patches: > > 1. Extend VectorType: https://reviews.llvm.org/D32530 > 2. Vector element type Tablegen constraint: https://reviews.llvm.org/D47768 > 3. LLT support for scalable vectors: https://reviews.llvm.org/D47769 > 4. EVT strings and Type mapping: https://reviews.llvm.org/D47770 > 5. SVE Calling Convention: https://reviews.llvm.org/D47771 > 6. Intrinsic lowering cleanup: https://reviews.llvm.org/D47772 > 7. Add VScale intrinsic: https://reviews.llvm.org/D47773 > 8. Add StepVector intrinsic: h...
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
2018 Jun 05
14
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...el %middle.block, label %vector.body, !llvm.loop !5 `` ========== 7. Patches ========== List of patches: 1. Extend VectorType: https://reviews.llvm.org/D32530 2. Vector element type Tablegen constraint: https://reviews.llvm.org/D47768 3. LLT support for scalable vectors: https://reviews.llvm.org/D47769 4. EVT strings and Type mapping: https://reviews.llvm.org/D47770 5. SVE Calling Convention: https://reviews.llvm.org/D47771 6. Intrinsic lowering cleanup: https://reviews.llvm.org/D47772 7. Add VScale intrinsic: https://reviews.llvm.org/D47773 8. Add StepVector intrinsic: https://reviews.llvm.org/D...
[EXT] Re: [RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
2019 May 24
2
[EXT] Re: [RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...el %middle.block, label %vector.body, !llvm.loop !5 `` ========== 7. Patches ========== List of patches: 1. Extend VectorType: https://reviews.llvm.org/D32530 2. Vector element type Tablegen constraint: https://reviews.llvm.org/D47768 3. LLT support for scalable vectors: https://reviews.llvm.org/D47769 4. EVT strings and Type mapping: https://reviews.llvm.org/D47770 5. SVE Calling Convention: https://reviews.llvm.org/D47771 6. Intrinsic lowering cleanup: https://reviews.llvm.org/D47772 7. Add VScale intrinsic: https://reviews.llvm.org/D47773 8. Add StepVector intrinsic: https://reviews.llvm.org/D...
[EXT] Re: [RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
2019 May 27
2
[EXT] Re: [RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...el %middle.block, label %vector.body, !llvm.loop !5 `` ========== 7. Patches ========== List of patches: 1. Extend VectorType: https://reviews.llvm.org/D32530 2. Vector element type Tablegen constraint: https://reviews.llvm.org/D47768 3. LLT support for scalable vectors: https://reviews.llvm.org/D47769 4. EVT strings and Type mapping: https://reviews.llvm.org/D47770 5. SVE Calling Convention: https://reviews.llvm.org/D47771 6. Intrinsic lowering cleanup: https://reviews.llvm.org/D47772 7. Add VScale intrinsic: https://reviews.llvm.org/D47773 8. Add StepVector intrinsic: https://reviews.llvm.org/D...
[EXT] Re: [RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
2019 Jun 03
2
[EXT] Re: [RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...> `` > > ========== > 7. Patches > ========== > > List of patches: > > 1. Extend VectorType: https://reviews.llvm.org/D32530 > 2. Vector element type Tablegen constraint: https://reviews.llvm.org/D47768 > 3. LLT support for scalable vectors: https://reviews.llvm.org/D47769 > 4. EVT strings and Type mapping: https://reviews.llvm.org/D47770 > 5. SVE Calling Convention: https://reviews.llvm.org/D47771 > 6. Intrinsic lowering cleanup: https://reviews.llvm.org/D47772 > 7. Add VScale intrinsic: https://reviews.llvm.org/D47773 > 8. Add StepVector intrinsic: h...
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
2018 Jul 30
7
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...t; > > > List of patches: > > > > 1. Extend VectorType: https://reviews.llvm.org/D32530 > > 2. Vector element type Tablegen constraint: > https://reviews.llvm.org/D47768 > > 3. LLT support for scalable vectors: https://reviews.llvm.org/D47769 > > 4. EVT strings and Type mapping: https://reviews.llvm.org/D47770 > > 5. SVE Calling Convention: https://reviews.llvm.org/D47771 > > 6. Intrinsic lowering cleanup: https://reviews.llvm.org/D47772 > > 7. Add VScale intrinsic: https://reviews.llvm.org/D47773...
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
2018 Jul 02
3
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...> `` > > ========== > 8. Patches > ========== > > List of patches: > > 1. Extend VectorType: https://reviews.llvm.org/D32530 > 2. Vector element type Tablegen constraint: https://reviews.llvm.org/D47768 > 3. LLT support for scalable vectors: https://reviews.llvm.org/D47769 > 4. EVT strings and Type mapping: https://reviews.llvm.org/D47770 > 5. SVE Calling Convention: https://reviews.llvm.org/D47771 > 6. Intrinsic lowering cleanup: https://reviews.llvm.org/D47772 > 7. Add VScale intrinsic: https://reviews.llvm.org/D47773 > 8. Add StepVector intrinsic: h...