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Hi Rail, Below 2 revisions might be of your interest which Detect SAD patterns and emit psadbw instructions on X86.: http://reviews.llvm.org/D14840 http://reviews.llvm.org/D14897 Intrinsics related to absdiff revisons : http://reviews.llvm.org/D10867 http://reviews.llvm.org/D11678 Hope this helps. Regards, Suyog On Sat, May 28, 2016 at 4:20 AM, Rail Shafigulin via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi Shahid. > > Do you mind providing a concrete example of X86 code where an intrinsic > was added (preferrable w...

...> Hi Rail, > > Below 2 revisions might be of your interest which Detect SAD patterns and > emit psadbw instructions on X86.: > > http://reviews.llvm.org/D14840 > http://reviews.llvm.org/D14897 > > Intrinsics related to absdiff revisons : > > http://reviews.llvm.org/D10867 > http://reviews.llvm.org/D11678 > > Hope this helps. > > Regards, > Suyog > > On Sat, May 28, 2016 at 4:20 AM, Rail Shafigulin via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > >> Hi Shahid. >> >> Do you mind providing a concrete example of...

Hi Shahid. Do you mind providing a concrete example of X86 code where an intrinsic was added (preferrable with filenames and line numbers)? I'm having difficulty tracking down the steps you provided. Any help is appreciated. On Mon, Apr 4, 2016 at 9:02 PM, Shahid, Asghar-ahmad < Asghar-ahmad.Shahid at amd.com> wrote: > Hi Rail, > > > > We had done this for generation

My target has an instruction that adds up all elements in the vector and stores the result in a register. I'm trying to implement it in my compiler but I'm not sure even where to start. I did look at other targets, but they don't seem to have anything like it ( I could be wrong. My experience with LLVM is limited, so if I missed it, I'd appreciate if someone could point it out ).