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2009 Jun 05
2
[LLVMdev] SSE Scalar Convert Intrinsics
On Friday 05 June 2009 15:22, Eli Friedman wrote: > > Do we need two intrinsics for these scalar converts, one to satisfy the > > (arguably broken) GCC interface and one to really reflect the operation > > as specified by the ISA? > > We really need zero intrinsics... it's quite easy to map onto existing > LLVM instructions. See the definition of CVTSD2SIrm. In
2009 Jun 05
0
[LLVMdev] SSE Scalar Convert Intrinsics
...gt;> We really need zero intrinsics... it's quite easy to map onto existing >> LLVM instructions.  See the definition of CVTSD2SIrm. > > In some cases, yes.  But not all of the X86 instructions are accessible > through LLVM IR. Like this one :) Sorry, I was confusing it with CVTTSD2SIrm. -Eli
2007 Dec 20
1
[LLVMdev] Code Generation Problem llvm 1.9
...t; %ESP = ADD32ri8 %ESP, 16 FSTP64m %EBP, 1, %NOREG, -160 %EAX = MOV32rm %EBP, 1, %NOREG, -224 %EAX = ADD32ri8 %EAX, 24 %XMM0 = MOVSDrm %EBP, 1, %NOREG, -160 MOVSDmr %EBP, 1, %NOREG, -232, %XMM0 MOVSDmr %EAX, 1, %NOREG, 0, %XMM0 %EAX = CVTTSD2SIrm %ESI, 1, %NOREG, 0 %ECX = MOV32r0 TEST32rr %EAX, %EAX JNE mbb<bb.preheader.i271,0x8c55330> Successors according to CFG: 0x8c55330 0x8c573b0 The gdb disassembler gives me the following lines for that basic block __exp.exit: 0xf5f6f317: movl $0xa542b70,0xffff...