search for: cvtsd2sirm

Displaying 4 results from an estimated 4 matches for "cvtsd2sirm".

2009 Jun 05
0
[LLVMdev] SSE Scalar Convert Intrinsics
On Fri, Jun 5, 2009 at 8:51 AM, David Greene<dag at cray.com> wrote: > def Int_CVTSD2SIrm : SDI<0x2D, MRMSrcMem, (outs GR32:$dst), (ins f128mem: > $src), >                         "cvtsd2si\t{$src, $dst|$dst, $src}", >                         [(set GR32:$dst, (int_x86_sse2_cvtsd2si >                                           (load addr:$src)))]>; > > Er...
2009 Jun 05
2
[LLVMdev] SSE Scalar Convert Intrinsics
...sics for these scalar converts, one to satisfy the > > (arguably broken) GCC interface and one to really reflect the operation > > as specified by the ISA? > > We really need zero intrinsics... it's quite easy to map onto existing > LLVM instructions. See the definition of CVTSD2SIrm. In some cases, yes. But not all of the X86 instructions are accessible through LLVM IR. And sometimes we like the ability to have our frontend lower to intrinsics so we know EXACTLY what code will come out the other end. And see my previous post about sint_to_fp with a memory operand not worki...
2009 Jun 05
5
[LLVMdev] SSE Scalar Convert Intrinsics
...2si64">, Intrinsic<[llvm_i64_ty, llvm_v2f64_ty], [IntrNoMem]>; This matches the signature of the GCC intrinsic. The fact that the GCC intrinsic has a type mismatch on the input (vector rather than scalar) is strange, but ok, we'll run with it. Until this: def Int_CVTSD2SIrm : SDI<0x2D, MRMSrcMem, (outs GR32:$dst), (ins f128mem: $src), "cvtsd2si\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse2_cvtsd2si (load addr:$src)))]>; Er, this makes us load a 128...
2009 Jun 05
0
[LLVMdev] SSE Scalar Convert Intrinsics
...r converts, one to satisfy the >> > (arguably broken) GCC interface and one to really reflect the operation >> > as specified by the ISA? >> >> We really need zero intrinsics... it's quite easy to map onto existing >> LLVM instructions.  See the definition of CVTSD2SIrm. > > In some cases, yes.  But not all of the X86 instructions are accessible > through LLVM IR. Like this one :) Sorry, I was confusing it with CVTTSD2SIrm. -Eli