Displaying 4 results from an estimated 4 matches for "cur4".
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cr4
2017 Apr 10
0
[PATCH 02/11] nvkm/ramgf100: Calculate timings
...efine T(t) cfg->timing_10_##t
+static int
+gf100_ram_timing_calc(struct gf100_ram *ram, u32 *timing)
+{
+ struct nvbios_ramcfg *cfg = &ram->base.target.bios;
+ struct nvkm_subdev *subdev = &ram->base.fb->subdev;
+ struct nvkm_device *device = subdev->device;
+ u32 cur1, cur2, cur4;
+
+ cur1 = nvkm_rd32(device, 0x10f294);
+ cur2 = nvkm_rd32(device, 0x10f298);
+ cur4 = nvkm_rd32(device, 0x10f2a0);
+
+ /* XXX: (G)DDR3? */
+ switch ((!T(CWL)) * ram->base.type) {
+ case NVKM_RAM_TYPE_GDDR5:
+ T(CWL) = (cur1 & 0x00000380) >> 7;
+ break;
+ }
+
+ timing[0] = (T(RP) &l...
2015 May 22
11
Reclocking support for NVA0
Adds reclocking for NVA0, and a whole lot of work for other cards. Had these
patches collecting dust for a little, but tested them with both my NVA0,
and Martin's a while back. Success not guaranteed, but should be quite a
leap forward.
Happy reviewing and testing. Cheers,
Roy
2017 Apr 10
14
RESEND Preparations for Fermi DRAM clock changes
Two patches went missing as a result of PEBCAK. No v2 marks as nothing
changed really. Just resending for easier enforcement of patch order
in other people's trees. Sorry for the noise.
Original message:
No, no, these will not implement Fermi reclocking. This set of patches
contains some of the preparatory work that I deem stable enough to
move upstream. Notable changes
- Training pattern
2017 Apr 10
11
Preparations for Fermi DRAM clock changes
No, no, these will not implement Fermi reclocking. This set of patches
contains some of the preparatory work that I deem stable enough to
move upstream. Notable changes
- Training pattern upload routines from GK104+ now shared with GT215+
- Timing calculation for Fermi
- GDDR5 MR calculation from VBIOS timing table v1.0. Also useful for that
pesky GT 240.
- A routine to translate a VBIOS init