search for: creg

Hi all. I have a big problem with date_select helper, because i guess it can''t resolve local variables to set correctly selected date. Small example: <% @client.charge_regs.each do |creg| %> <%= form_remote_tag with_progress(:url => { :action => ''foo'' }) %> <%= date_select ''creg'', ''valid_before'' %> <% end_form_tag %> <% end %> selected date will be assigned to current date instead of ...

...luate the model (In Sample Testing)") #Ok our ranges are comfirmed we'll get a better graph later # This Heavy Voodoo™ allows us to have a dynamic number of #dummy variables we can add\remove from the spreadsheet forecastDistance <- 52 #Grab Existing Regressors (clipping out the data) cReg <- sh2[1:modLength,-1] mcReg <- sh2[1:modMax,-1] #transform the on\offs into proper factors for(i in names(cReg)) cReg[[i]] <- factor(cReg[[i]]) for(i in names(mcReg)) mcReg[[i]] <- factor(mcReg[[i]]) #Grab X Future Regressors equal to the forecastDistance (gotta double check if I need...

...anged, 2 insertions(+), 2 deletions(-) diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c index 63ea5a606ecd..180c260a8221 100644 --- a/arch/arc/plat-axs10x/axs10x.c +++ b/arch/arc/plat-axs10x/axs10x.c @@ -84,7 +84,7 @@ static void __init axs10x_print_board_ver(unsigned int creg, const char *str) unsigned int val; } board; - board.val = ioread32((void __iomem *)creg); + board.val = ioread32((const void __iomem *)creg); pr_info("AXS: %s FPGA Date: %u-%u-%u\n", str, board.d, board.m, board.y); } @@ -95,7 +95,7 @@ static void __init axs10x_early_init(vo...

...anged, 2 insertions(+), 2 deletions(-) diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c index 63ea5a606ecd..180c260a8221 100644 --- a/arch/arc/plat-axs10x/axs10x.c +++ b/arch/arc/plat-axs10x/axs10x.c @@ -84,7 +84,7 @@ static void __init axs10x_print_board_ver(unsigned int creg, const char *str) unsigned int val; } board; - board.val = ioread32((void __iomem *)creg); + board.val = ioread32((const void __iomem *)creg); pr_info("AXS: %s FPGA Date: %u-%u-%u\n", str, board.d, board.m, board.y); } @@ -95,7 +95,7 @@ static void __init axs10x_early_init(vo...

...anged, 2 insertions(+), 2 deletions(-) diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c index 63ea5a606ecd..180c260a8221 100644 --- a/arch/arc/plat-axs10x/axs10x.c +++ b/arch/arc/plat-axs10x/axs10x.c @@ -84,7 +84,7 @@ static void __init axs10x_print_board_ver(unsigned int creg, const char *str) unsigned int val; } board; - board.val = ioread32((void __iomem *)creg); + board.val = ioread32((const void __iomem *)creg); pr_info("AXS: %s FPGA Date: %u-%u-%u\n", str, board.d, board.m, board.y); } @@ -95,7 +95,7 @@ static void __init axs10x_early_init(vo...

to clean up some code I would like to make a list of arbitrary length to store?various objects for use in a loop sample code: ############ BEGIN SAMPLE ############## # You can see the need for a loop already linearModel1=lm(modelSource ~ .,mcReg) linearModel2=step(linearModel1) linearModel3=lm(modelSource ~ .-1,mcReg) linearModel4=step(linearModel3) #custom linearModel5=lm(modelSource ~ . -ACF-MonthlyST1-MonthlyST2-MonthlyBLA,mcReg) LinearModel1.res <- residuals(linearModel1) LinearModel2.res <- residuals(linearModel2) LinearModel3....

...@@ -845,9 +845,8 @@ init_idx_addr_latched(struct nvbios_init *init) u32 data = nv_ro32(bios, init->offset + 13); u8 count = nv_ro08(bios, init->offset + 17); - trace("INDEX_ADDRESS_LATCHED\t" - "R[0x%06x] : R[0x%06x]\n\tCTRL &= 0x%08x |= 0x%08x\n", - creg, dreg, mask, data); + trace("INDEX_ADDRESS_LATCHED\tR[0x%06x] : R[0x%06x]\n", creg, dreg); + trace("\tCTRL &= 0x%08x |= 0x%08x\n", mask, data); init->offset += 18; while (count--) { -- 1.8.3.2

I'm trying to add support for inline assembly and I keep getting this error: <jal> "<inline asm>:1:2: error: invalid instruction" which is due to the fact that MatchInstructionImpl() returns Match_MnemonicFail. This function is tablegen'ed in XXXGenAsmMatcher.inc and for some reason it can't find JAL even though I can clearly see it in both MatchTable0[] and

...(huawei1) [^CARDLOCK: 2,10,0] ]Aug 27 13:22:27] DEBUG[560]: chan_sebi.c:853 data_write: data_write() (huawei1) [AT+CLIP=1 [Aug 27 13:22:27] DEBUG[560]: chan_sebi.c:1011 do_monitor_phone: data_read() (huawei1) [OK] ]Aug 27 13:22:27] DEBUG[560]: chan_sebi.c:853 data_write: data_write() (huawei1) [AT+CREG? [Aug 27 13:22:27] DEBUG[560]: chan_sebi.c:1011 do_monitor_phone: data_read() (huawei1) [OK] [Aug 27 13:22:27] DEBUG[560]: chan_sebi.c:1011 do_monitor_phone: data_read() (huawei1) [+CREG: 0,1] ]Aug 27 13:22:27] DEBUG[560]: chan_sebi.c:853 data_write: data_write() (huawei1) [AT+COPS=3,0 [Aug 27 13:2...

This patchset applies some minor fixes to renouveau.xml and then unifies the nv30 and nv40 register definitions. nv30 and nv40 are very similar and have the same offsets for the registers they share. The major differences are: 1. Texture setup is different due to full NPOT support on nv40 2. More advanced blending/render targets on nv40 3. NV30 has fixed function registers, which NV40 lacks The

..."]] #SET IT ALL TO 0 sh2[[tmpname]][]<-FALSE #SET The Proper Indice to TRUE sh2[[tmpname]][z]<- TRUE } So to get rid of them (those empty useless regressors) I cooked up this: ################################################### #Prune Empty Regressors (All false or all true) # the newmcReg you see is a copy of the sh2 from earlier # newmcReg = New Model Current Regressors # sh2 later became cReg. # # Yes it makes my eyes bleed. in short we count all the trues # and all the false and if they happen to be the same number # as the length we know they are all true or false. # # the trick...

I am trying to build xen on x86_64 SLES 9 SP2 box this morning and am getting this error: arch/xen/kernel/built-in.o(.text+0x1bd6): In function `__do_suspend'': : undefined reference to `HYPERVISOR_vcpu_pickle'' make[4]: *** [.tmp_vmlinux1] Error 1 make[4]: Leaving directory `/tmp/xen-unstable.hg/linux-2.6.12-xen0'' make[3]: *** [build] Error 2 make[3]: Leaving directory

Dear useRs: Is there a way to include a raster image (e.g., .gif, .jpg, .bmp) representing a company logo, a school logo, etc. into an R graphic? For example, it would be nice to be able to include the logo of the school into the charts that a student produces for her dissertation. Similarly, while working on a competitive analysis, it would be nice to be able to replace the names of the

Hi, Changes since v1 ================ https://lore.kernel.org/lkml/1578415992-24054-1-git-send-email-krzk at kernel.org/ 1. Constify also ioreadX_rep() and mmio_insX(), 2. Squash lib+alpha+powerpc+parisc+sh into one patch for bisectability, 3. Add Geert's review, 4. Re-order patches so all optional driver changes are at the end. Description =========== The ioread8/16/32() and others have

Hi, Changes since v1 ================ https://lore.kernel.org/lkml/1578415992-24054-1-git-send-email-krzk at kernel.org/ 1. Constify also ioreadX_rep() and mmio_insX(), 2. Squash lib+alpha+powerpc+parisc+sh into one patch for bisectability, 3. Add acks and reviews, 4. Re-order patches so all optional driver changes are at the end. Description =========== The ioread8/16/32() and others have

Hi, Changes since v1 ================ https://lore.kernel.org/lkml/1578415992-24054-1-git-send-email-krzk at kernel.org/ 1. Constify also ioreadX_rep() and mmio_insX(), 2. Squash lib+alpha+powerpc+parisc+sh into one patch for bisectability, 3. Add acks and reviews, 4. Re-order patches so all optional driver changes are at the end. Description =========== The ioread8/16/32() and others have

Hi, Changes since v1 ================ https://lore.kernel.org/lkml/1578415992-24054-1-git-send-email-krzk at kernel.org/ 1. Constify also ioreadX_rep() and mmio_insX(), 2. Squash lib+alpha+powerpc+parisc+sh into one patch for bisectability, 3. Add acks and reviews, 4. Re-order patches so all optional driver changes are at the end. Description =========== The ioread8/16/32() and others have

Hi, The ioread8/16/32() and others have inconsistent interface among the architectures: some taking address as const, some not. It seems there is nothing really stopping all of them to take pointer to const. Patchset was really tested on all affected architectures. Build testing is in progress - I hope auto-builders will point any issues. Todo ==== Convert also string versions (ioread16_rep()

Hi, The ioread8/16/32() and others have inconsistent interface among the architectures: some taking address as const, some not. It seems there is nothing really stopping all of them to take pointer to const. Patchset was really tested on all affected architectures. Build testing is in progress - I hope auto-builders will point any issues. Todo ==== Convert also string versions (ioread16_rep()

Hi, The ioread8/16/32() and others have inconsistent interface among the architectures: some taking address as const, some not. It seems there is nothing really stopping all of them to take pointer to const. Patchset was really tested on all affected architectures. Build testing is in progress - I hope auto-builders will point any issues. Todo ==== Convert also string versions (ioread16_rep()