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[PATCH 10/14] arm: implement ARMv7 tlb ops.
2012 Feb 13
0
[PATCH 10/14] arm: implement ARMv7 tlb ops.
...ENTRY(cpu_flush_cache_range) mrc p15, 1, r3, c0, c0, 0 @ read CSIDR and r3, r3, #7 @ cache line size encoding mov r3, #16 @ size offset @@ -74,9 +71,7 @@ 1: dsb mov pc, lr -DECLARE_CPU_OP(cpu_flush_cache_range, v7_flush_cache_range) - -PRIVATE(v7_clean_cache_range) +ENTRY(cpu_clean_cache_range) mrc p15, 1, r3, c0, c0, 0 @ read CSIDR and r3, r3, #7 @ cache line size encoding mov r3, #16 @ size offset @@ -90,5 +85,3 @@ 1: dsb mov pc, lr -DECLARE_CPU_OP(cpu_clean_cache_range, v7_clean_cache_range) - diff -r c6a412adfae7 xen/arch/arm/xen/domain_build.c --- a/xen/a...