Displaying 20 results from an estimated 166 matches for "coprocessor".
2013 Aug 16
1
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
On Thu, 2013-08-15 at 12:14 +0200, Pavel Machek wrote:
> Hi!
>
Hi!
> > > > Since it is a PCIe card, it does not have the ability to host hardware
> > > > devices for networking, storage and console. We provide these devices
> > > > on X100 coprocessors thus enabling a self-bootable equivalent environment
> > > > for applications. A key benefit of our solution is that it leverages
> > > > the standard virtio framework for network, disk and console devices,
> > > > though in our case the virtio framework is used...
2013 Aug 16
1
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
On Thu, 2013-08-15 at 12:14 +0200, Pavel Machek wrote:
> Hi!
>
Hi!
> > > > Since it is a PCIe card, it does not have the ability to host hardware
> > > > devices for networking, storage and console. We provide these devices
> > > > on X100 coprocessors thus enabling a self-bootable equivalent environment
> > > > for applications. A key benefit of our solution is that it leverages
> > > > the standard virtio framework for network, disk and console devices,
> > > > though in our case the virtio framework is used...
2013 Aug 14
2
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
On Tue, 2013-08-13 at 14:43 +0200, Pavel Machek wrote:
> Hi!
>
> > Since it is a PCIe card, it does not have the ability to host hardware
> > devices for networking, storage and console. We provide these devices
> > on X100 coprocessors thus enabling a self-bootable equivalent environment
> > for applications. A key benefit of our solution is that it leverages
> > the standard virtio framework for network, disk and console devices,
> > though in our case the virtio framework is used across a PCIe bus.
>
>...
2013 Aug 14
2
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
On Tue, 2013-08-13 at 14:43 +0200, Pavel Machek wrote:
> Hi!
>
> > Since it is a PCIe card, it does not have the ability to host hardware
> > devices for networking, storage and console. We provide these devices
> > on X100 coprocessors thus enabling a self-bootable equivalent environment
> > for applications. A key benefit of our solution is that it leverages
> > the standard virtio framework for network, disk and console devices,
> > though in our case the virtio framework is used across a PCIe bus.
>
>...
2013 Aug 15
0
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
Hi!
> > > Since it is a PCIe card, it does not have the ability to host hardware
> > > devices for networking, storage and console. We provide these devices
> > > on X100 coprocessors thus enabling a self-bootable equivalent environment
> > > for applications. A key benefit of our solution is that it leverages
> > > the standard virtio framework for network, disk and console devices,
> > > though in our case the virtio framework is used across a PCIe...
2013 Feb 08
1
[LLVMdev] Asm syntax of Mips m[tf]cX coprocessor instructions
...y Fitzhardinge wrote:> Hi all,
>
> I'm experimenting with compiling some Mips code which is normally built
> with a gcc cross toolchain with clang instead. This code targets the
> Cavium Octeon, and uses some of that CPU's crypto engine features which
> are implemented in coprocessor 2.
>
> The inline asm for the crypto code uses instructions of the form "dmtc2
> %0, 0xNNNN" - that is the coprocessor register is represented as a
> constant, which is the only syntax that gas seems to accept
> (specifically, an expression which evaluates to a constant)....
2013 Feb 08
0
[LLVMdev] Asm syntax of Mips m[tf]cX coprocessor instructions
Hi all,
I'm experimenting with compiling some Mips code which is normally built
with a gcc cross toolchain with clang instead. This code targets the
Cavium Octeon, and uses some of that CPU's crypto engine features which
are implemented in coprocessor 2.
The inline asm for the crypto code uses instructions of the form "dmtc2
%0, 0xNNNN" - that is the coprocessor register is represented as a
constant, which is the only syntax that gas seems to accept
(specifically, an expression which evaluates to a constant). Clang's
integrated-a...
2013 Aug 01
0
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
On Wed, Jul 24, 2013 at 08:31:31PM -0700, Sudeep Dutt wrote:
> An Intel MIC X100 device is a PCIe form factor add-in coprocessor
> card based on the Intel Many Integrated Core (MIC) architecture
> that runs a Linux OS. It is a PCIe endpoint in a platform and therefore
> implements the three required standard address spaces i.e. configuration,
> memory and I/O. The host OS loads a device driver as is typical for
&...
2013 Aug 01
1
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
Hello Sudeep Dutt,
On Wed, Jul 31, 2013 at 06:46:08PM -0700, Greg Kroah-Hartman wrote:
> On Wed, Jul 24, 2013 at 08:31:31PM -0700, Sudeep Dutt wrote:
> > An Intel MIC X100 device is a PCIe form factor add-in coprocessor
> > card based on the Intel Many Integrated Core (MIC) architecture
> > that runs a Linux OS. It is a PCIe endpoint in a platform and therefore
> > implements the three required standard address spaces i.e. configuration,
> > memory and I/O. The host OS loads a device driver...
2013 Aug 01
1
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
Hello Sudeep Dutt,
On Wed, Jul 31, 2013 at 06:46:08PM -0700, Greg Kroah-Hartman wrote:
> On Wed, Jul 24, 2013 at 08:31:31PM -0700, Sudeep Dutt wrote:
> > An Intel MIC X100 device is a PCIe form factor add-in coprocessor
> > card based on the Intel Many Integrated Core (MIC) architecture
> > that runs a Linux OS. It is a PCIe endpoint in a platform and therefore
> > implements the three required standard address spaces i.e. configuration,
> > memory and I/O. The host OS loads a device driver...
2013 Aug 13
0
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
Hi!
> Since it is a PCIe card, it does not have the ability to host hardware
> devices for networking, storage and console. We provide these devices
> on X100 coprocessors thus enabling a self-bootable equivalent environment
> for applications. A key benefit of our solution is that it leverages
> the standard virtio framework for network, disk and console devices,
> though in our case the virtio framework is used across a PCIe bus.
Interesting...
> Do...
2013 Oct 10
15
Remapping port below 1024 on the firewall
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Explore tips for MPI, OpenMP, advanced profiling, and more. Get the most from
the latest Intel processors and coprocessors. See abstracts and register >
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2008 Feb 01
6
Dynamic Change Parameters..
I am going to improve theora codec with dynamically changing way. In this
case we want to change compression parameters like video_q, sharpness when a
keyframe is generated. When i set video quality parameter using cpi->
pb.info.quality in CommpressKeyFrame in encoder_toplevel it will not change
dynamically. Can you please help me to do this. Wich function should i cange
to achieve my
2013 Sep 26
0
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
On Thu, 2013-09-26 at 14:33 -0700, Joe Perches wrote:
> On Thu, 2013-09-26 at 13:54 -0700, Greg Kroah-Hartman wrote:
> > On Thu, Sep 05, 2013 at 06:36:08PM -0700, Joe Perches wrote:
> > > Whitespace neatening...
> > >
> > > Multiline statement argument alignment.
> > > Argument wrapping.
> > > Use kmalloc_array instead of kmalloc.
> >
2013 Sep 26
2
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
On Thu, Sep 05, 2013 at 06:36:08PM -0700, Joe Perches wrote:
> Whitespace neatening...
>
> Multiline statement argument alignment.
> Argument wrapping.
> Use kmalloc_array instead of kmalloc.
>
> ---
-ENOSIGNEDOFFBY :(
2013 Sep 26
0
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
On Thu, 2013-09-26 at 13:54 -0700, Greg Kroah-Hartman wrote:
> On Thu, Sep 05, 2013 at 06:36:08PM -0700, Joe Perches wrote:
> > Whitespace neatening...
> >
> > Multiline statement argument alignment.
> > Argument wrapping.
> > Use kmalloc_array instead of kmalloc.
> >
> > ---
>
> -ENOSIGNEDOFFBY :(
These were just suggestions for Sudeep.
2013 Sep 26
0
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
On Thu, 2013-09-26 at 13:54 -0700, Greg Kroah-Hartman wrote:
> On Thu, Sep 05, 2013 at 06:36:08PM -0700, Joe Perches wrote:
> > Whitespace neatening...
> >
> > Multiline statement argument alignment.
> > Argument wrapping.
> > Use kmalloc_array instead of kmalloc.
> >
> > ---
>
> -ENOSIGNEDOFFBY :(
These were just suggestions for Sudeep.
2013 Sep 26
2
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
On Thu, Sep 05, 2013 at 06:36:08PM -0700, Joe Perches wrote:
> Whitespace neatening...
>
> Multiline statement argument alignment.
> Argument wrapping.
> Use kmalloc_array instead of kmalloc.
>
> ---
-ENOSIGNEDOFFBY :(
2013 Oct 03
7
TCCLASSES vs Providers
...------------------------------------------------------------------------------
October Webinars: Code for Performance
Free Intel webinars can help you accelerate application performance.
Explore tips for MPI, OpenMP, advanced profiling, and more. Get the most from
the latest Intel processors and coprocessors. See abstracts and register >
http://pubads.g.doubleclick.net/gampad/clk?id=60134791&iu=/4140/ostg.clktrk
2013 May 30
9
[PATCH v2 0/2] Implement VFP context switch for arm32
Hello,
This is the second version of this patch series.
I only implement the VPF context switch support for arm32 and add dummy function
to avoid compilation on arm64.
I have switched the order of the patch because the old second one can be applied
alone and the patch are cleaner :).
For all the changes see each patch.
Cheers,
Julien Grall (2):
xen/arm: don''t enable VFP on XEN