Displaying 6 results from an estimated 6 matches for "copro".
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copr
2008 Jun 05
3
centos 4 on ebox 2300sx
hi all,
I am attempting to install centos 4.4 on an ebox 2300sx.
I start with "i586 text" everything starts up and then I get:
No coprocessor found and no math emulation present.
How do I get math emulation?
THanks
Jerry
2004 Jun 07
1
[LLVMdev] Some backend questions
...it's a pretty RISCy processor, but has some snazzy addressing modes
> with pre/post in/decrements.
Yes. It's my impression that most DSPs have such "snazzy" addressing modes ;-)
> I assume that you're planning on only
> targetting the RISC core and not the vector copro?
Right. It would be experemely hard to generate efficient code for the vector
unit.
- Volodya
2004 Jun 07
0
[LLVMdev] Some backend questions
...ot the standard
> compiler.
Ohhh, sounds great. From a brief look through their data sheets, it looks
like it's a pretty RISCy processor, but has some snazzy addressing modes
with pre/post in/decrements. I assume that you're planning on only
targetting the RISC core and not the vector copro?
-Chris
--
http://llvm.cs.uiuc.edu/
http://www.nondot.org/~sabre/Projects/
2004 Jun 07
2
[LLVMdev] Some backend questions
Chris Lattner wrote:
> > 1. The MachineInstrBuilder has methods to add register operand and
> > immediate operand. However, what would be really nice is a method to add
> > Value*. So, I would write:
> >
> > BuildMI(*BB, NM::add, 1).add(I.getOperand(0), I.getOperand(1));
> >
> > and depending on whether the passed Value* is contant or instruction,
2013 Jan 23
132
[PATCH 00/45] initial arm v8 (64-bit) support
...AArch64 system register and a AArch32 cp register. To try and reduce
ifdeferry in common code I''ve introduced some macros which take the
AArch64 name but which translate to the appropriate AArch32 cpreg access
in the 32-bit hypervisor. A little bit of ifdeferry remains.
Other uses of the coprocessors (e.g. cache/TLB flushing etc) are
replaced with explicit instructions (again there''s mostly a 1-1
mapping). We had already wrapped most of these in a suitable inline
function so it was easy enough to abstract away.
Lastly, rather than switch internally from explicitly sized types t...
2013 Feb 22
48
[PATCH v3 00/46] initial arm v8 (64-bit) support
This round implements all of the review comments from V2 and all patches
are now acked. Unless there are any objections I intend to apply later
this morning.
Ian.