Displaying 6 results from an estimated 6 matches for "conv14".
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conv1
2012 Jan 26
0
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
...instructions with candidate pairs
BBV: done!
BBV: fusing loop #1 for for.body10 in main...
BBV: found 22 instructions with candidate pairs
BBV: found 82 pair connections.
BBV: selected pairs in the best tree for: %0 = load i8* %r.063,
align 1, !tbaa !0
BBV: selected pair: %mul23 = mul nsw i32 %conv14, 234 <-> %mul35 =
mul nsw i32 %conv15, 543
BBV: selected pair: %0 = load i8* %r.063, align 1, !tbaa !0 <-> %1
= load i8* %incdec.ptr11, align 1, !tbaa !0
BBV: selected pair: %conv14 = zext i8 %0 to i32 <-> %conv15 = zext
i8 %1 to i32
BBV: selected pair: %add26 = add i3...
2012 Jan 26
3
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
On Thu, 2012-01-26 at 15:12 -0600, Sebastian Pop wrote:
> On Thu, Jan 26, 2012 at 2:49 PM, Hal Finkel <hfinkel at anl.gov> wrote:
> > Thanks! Did you compile with any non-default flags other than -mllvm
> > -vectorize?
>
> I used -O3 and -vectorize, no other non-default flags.
If I run clang -O3 -mllvm -vectorize -S -emit-llvm -o test.ll test.c
then I get no
2012 Jan 26
0
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
On Thu, Jan 26, 2012 at 3:41 PM, Hal Finkel <hfinkel at anl.gov> wrote:
> On Thu, 2012-01-26 at 15:36 -0600, Sebastian Pop wrote:
>> arm-none-linux-gnueabi
>
> Indeed, adding -ccc-host-triple arm-none-linux-gnueabi I also get
Minor remark: please use -target instead of -ccc-host-triple that is
now deprecated.
Thanks for looking at this testcase.
Sebastian
--
Qualcomm
2012 Jan 26
2
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
On Thu, 2012-01-26 at 15:36 -0600, Sebastian Pop wrote:
> arm-none-linux-gnueabi
Indeed, adding -ccc-host-triple arm-none-linux-gnueabi I also get
vectorization (even though I don't get vectorization when targeting
x86_64). I'll let you know what I find.
-Hal
--
Hal Finkel
Postdoctoral Appointee
Leadership Computing Facility
Argonne National Laboratory
2018 Jan 22
2
always allow canonicalizing to 8- and 16-bit ops?
Thanks for the perf testing. I assume that DAG legalization is equipped to
handle these cases fairly well, or someone would've complained by now...
FWIW (and at least some of this can be blamed on me), instcombine already
does the narrowing transforms without checking shouldChangeType() for
binops like and/or/xor/udiv. The justification was that narrower ops are
always better for
2013 Feb 14
1
[LLVMdev] LiveIntervals analysis problem
...%if.end12.i.for.body.i599_crit_edge.i, %if.end153.i
%266 = phi i16 [ %256, %if.end153.i ], [ %.pre1004.i, %if.end12.i.for.body.i599_crit_edge.i ]
%i.025.i.i = phi i32 [ 3, %if.end153.i ], [ %phitmp1011.i, %if.end12.i.for.body.i599_crit_edge.i ]
%bits.024.i.i = phi i16 [ 0, %if.end153.i ], [ %conv14.i.i, %if.end12.i.for.body.i599_crit_edge.i ]
%x.addr.023.i.i = phi i16* [ %incdec.ptr1.1.i581.i, %if.end153.i ], [ %incdec.ptr.i602.i, %if.end12.i.for.body.i599_crit_edge.i ]
%and.i597.i = and i16 %266, 1
%tobool.i598.i = icmp eq i16 %and.i597.i, 0
br i1 %tobool.i598.i, label %if.end.i601.i...